One layer spider interconnect

Details One layer spider interconnect One layer spider interconnect

2000-11-30

2002-07-16

Paladini, Albert W. (Department: 2827)

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

C174S260000, C257S692000, C326S030000, C361S772000

Reexamination Certificate

active

06420663

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to wiring layout of integrated circuits, and specifically to wiring layouts delivering high-speed signals with high on-chip fanout.
BACKGROUND OF THE INVENTION
Clock signals in synchronous circuits control the timing and throughput of the entire system, and it is thus critical to reduce skew between corresponding signals of the system. The skew is caused, amongst other factors, by the fact that not all circuits are equidistant. from the clock driver. Since the clock signals must be distributed globally, clock skew is a major concern in digital system design. One of the ways by which skew is minimized is by using a symmetric network for clock signal transfer.
Existing systems for dual signal distribution make extensive use of layer interchanges to keep the network symmetric. At frequencies of 2 GHz and higher, however, inductance and resistance effects in the network become more significant (capacitance effects become significant from a lower frequency limit). In particular, reflections from line-discontinuities such as inter-layer vias become increasingly significant and variable,
FIG. 1
is a schematic diagram of a symmetric H-tree design used for distributing a single clock signal within an integrated circuit, as is known in the art. A clock signal is input at the center of the H-tree, and is distributed to customers at the extremities of the tree. In the context of the present patent application and in the claims, the term “customers” is used to refer to any and all circuits that receive and make use of the clock signal. Skew between the clock signals delivered to the customers is minimized since the paths to each customer are equal in length. The H-tree pattern can be used on a single layer as long as only one clock signal is distributed. In circuits, for example, comprising differential systems, where the clock signal comprises a symmetric differential (dual) signal, there is no way to make an H-tree for the dual signal on a single metal layer. Accordingly, a single layer wiring method would be desirable in avoiding problems for distributing a pair of signals.
SUMMARY OF THE INVENTION
In preferred embodiments of the present invention, a single metal layer in an integrated circuit supplies a high-speed differential signal from a differential signal source to a plurality of customer. In order to minimize signal interference and skew, signal lines preferably do not intersect except at the signal source, thus enabling usage of a single metal layer for the signal distribution. Preferably, the signal source is positioned centrally with respect to the plurality of customers. Most preferably, the lines used to connect the signal source and the plurality of customers are symmetrical and have substantially equal lengths. In an area where the signal source is situated, line intersections and vias to other metal layers are allowed. In contrast, in the remainder of the integrated circuit a single metal layer is used. In some preferred embodiments of the present invention, up to eight customers can be supplied using a single metal layer.
In some preferred embodiments of the present invention, wiring from the signal source to each customer is by a pair of substantially straight lines to each customer. Most preferably, the pairs of straight lines are radial and are separated by 45° angles for the case of eight customers. In general, lines are preferably separated by
360
⁢
°
n
angles, where n is the number of customers.
In other preferred embodiments of the present invention, preferably where technology producing the wiring does not allow angles other than right angles, wiring from the signal source to each customer comprises separate lines having right angle turns and right angle branches, so that one line supplies more than one customer.
In some preferred embodiments of the present invention the differential signal is amplified by a buffer. The buffered signal is transmitted to each customer along a pair of wires that are separated by one or more shields to minimize interference effects.
There is provided, according to a preferred embodiment of the present invention, an integrated circuit device, including:
a substrate;
a signal source disposed on the substrate, and which is adapted to supply a pair of signals;
a first plurality of customers positioned remote from the signal source on the substrate, each of which customers is adapted to receive the pair of signals; and
a second plurality of conductors, formed substantially within a single layer of conductive material deposited on the substrate, and arranged to distribute the pair of signals from the signal source to each of the customers.
Preferably, the second plurality of conductors are formed so as to minimize differences among the signals received by the customers,
Further preferably, the second plurality of conductors include conductors which are substantially equal in length.
Preferably, the second plurality of conductors form a pattern which has a symmetry with respect to the signal source.
Preferably, the signal source is centrally disposed relative to the first plurality of customers.
Preferably, the pair of signals includes a differential pair of clock signals.
Further preferably, the second plurality of conductors includes conductors which make angles of 90° with each other.
Alternatively or additionally, the second plurality of conductors includes conductors which make angles of 45° with each other.
Preferably, the second plurality of conductors includes conductors which are formed as substantially one straight line from the signal source to each respective customer comprised in the first plurality of customers.
Alternatively, the second plurality of conductors includes conductors which are formed as branched lines from the signal source to each respective customer comprised in the first plurality of customers.
There is further provide, according to a preferred embodiment of the present invention, a method for distributing signals within an integrated circuit, including:
providing a substrate;
supplying a pair of signals from a signal source disposed on the substrate;
positioning a first plurality of customers remote from the signal source on the substrate, each of which customers is adapted to receive the pair of signals;
forming a second plurality of conductors substantially within a single layer of conductive material deposited on the substrate, and
distributing the pair of signals from the signal source to each of the plurality of customers via the second plurality of conductors.
Preferably, forming the second plurality of conductors includes forming the conductors so as to minimize differences among the signals received by the customers.
Further preferably, forming the second plurality of conductors includes forming the conductors to be substantially equal in length.
Preferably, forming the second plurality of conductors includes forming the conductors in a pattern which has a symmetry with respect to the signal source.
Preferably, the signal source is centrally disposed relative to the first plurality of customers.
Further preferably, the pair of signals includes a differential pair of clock signals.
Preferably, forming the second plurality of conductors includes forming conductors which make angles of 90° with each other.
Alternatively or additionally, forming the second plurality of conductors includes forming conductors which make angles of 45° with each other.
Preferably, forming the second plurality of conductors includes forming conductors which are substantially one straight line from the signal source to each respective customer comprised in the first plurality of customers.
Alternatively, forming the second plurality of conductors includes forming conductors which are branched lines from the signal source to each respective customer comprised in the first plurality of customers.
There is further provided, according to a preferred embodiment of the present invention, a method for fabricating an integrated circuit on a substrate, including:
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