One-chip microcomputer and program development/evaluation system

Boots – shoes – and leggings

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364243, 364267, 36426791, 3642492, 364DIG1, 395500, G06F 900

Patent

active

055749321

ABSTRACT:
A one-chip microcomputer having a mode setting circuit 40a in a first MCU 1a and a second MCU 1b for setting either a first evaluation operation mode under which the operations of memory 3a stops and programs and data are read from the outside via terminals 7a, 8a and 9a of a first peripheral device 41a in order to operate a CPU 2a or a second evaluation operation mode under which an operation of the CPU 2a stops and signals are input/output from/to the outside via terminals 12a, 13a, and 14a of a second peripheral device 42a in order to control the first peripheral device 41a, wherein the terminals 7a, 8a and 9a of the first peripheral device 41a of the first MCU 1a are connected to the terminals 12a, 13a and 14a of the second peripheral device 42b of the second MCU 1b and a debug ROM 11. The number of external terminals necessary for program development and evaluation can be decreased and exterior peripheral devices are not needed for program development and evaluation.

REFERENCES:
patent: 4580216 (1986-04-01), Bellay
patent: 4670838 (1987-06-01), Kawata
patent: 4811345 (1989-03-01), Johnson
patent: 5021996 (1991-06-01), Watanabe
patent: 5089951 (1992-02-01), Iijima

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