Boots – shoes – and leggings
Patent
1982-03-19
1984-08-21
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 1306
Patent
active
044674201
ABSTRACT:
A one-chip microcomputer including a central processing unit, a direct memory access controller and a random-access memory. In a DMA operation mode, data stored in the random-access memory is transmitted through common terminals to the exterior by means of a time-division control circuit or registers for parallel-serial conversion. The common terminals are also used for a CPU operation mode.
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patent: 4348720 (1982-09-01), Blahut et al.
Funatsu, S. et al., "Digital Fault Simulation in Bidirectional Bus Circuit Environments", IEEE Digest of Papers, Oct. 1980, pp. 155-157.
Burton, D. et al., "Know a Microcomputer's Bus Structure", Electronic Design, vol. 26, No. 13, Jun. 1978, pp. 78-84.
Hann et al., "Mikroprozessoren, Mikroprozessrechner, und Mikroprozessrechner Systeme", Elektrie, vol. 32, No. 8, 1978, pp. 429-437.
Chow et al., "MAC-4: A Single-Chip Microcomputer", The Bell System Technical Journal, vol. 58, No. 4, Apr. 1979, pp. 959-962.
Murakami Jyoji
Watanabe Tsuyoshi
Fujitsu Limited
Zache Raulfe B.
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