Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2001-03-13
2002-10-29
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S144000, C341S155000, C341S172000
Reexamination Certificate
active
06473017
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to the field of analog-to-digital (“A/D”) or digital-to-analog (“D/A”) signal conversion. More particularly, the invention relates to a system and method for digitizing the amplitude of a stream of digitized samples using a one-bit 2
nd
order sigma delta modulator (“&Sgr;&Dgr; modulation”).
BACKGROUND OF THE INVENTION
In a typical analog to digital signal conversion, analog signals (“x(t)”) are sampled and then transformed into digital signal (“x{circumflex over ( )}k”) equivalents. Analog signals, x(t), are both continuous in time and in amplitude. In order to properly digitize an analog signal, the analog signal's amplitude and time must be digitized. Sigma delta modulators digitize the analog signal's amplitude.
The maximum frequency for an analog signal, x(t), is known as f
max
. Analog signals include, but are not limited to, audio signals. An exemplary audio signal f
max
=20,000 Hertz. The rate at which analog signals are sampled is known as f
samp
. Once an analog signal has been sampled, the original signal which was both continuous in time and amplitude is now represented as a set of numbers (“x
k
”) which is no longer continuous in time. The set of numbers, x
k
, is represented as
x
k
=x
(
k/f
samp
) (Equation 1)
where k=0, 1, 2, 3 and f
samp
=constant.
It is well known in the art that if
f
samp
>2
f
max
(Equation 2)
it is possible to recover the original analog x(t) signal from the signal set, x
k
. After the analog signal, x(t), has been sampled and converted into the sequence of numbers x
k
, the signal is feed into a &Sgr;&Dgr; modulator which digitizes the amplitude of the signal set x
k
. The &Sgr;&Dgr; modulator produces an output q
k
which is a sequence of samples that is both discrete in time and in amplitude. Because the &Sgr;&Dgr; modulator distorts the x
k
sequence, q
k
is fed into a lowpass filter. If a &Sgr;&Dgr; modulator is properly designed, a good approximation of x
k
can be recovered from q
k
. This is accomplished by lowpass filtering the q
k
signal with a cutoff frequency (“f
cutoff
”) equal to f
max
. A &Sgr;&Dgr; modulator's performance is measured by evaluating the time-average of the squared error (x{circumflex over ( )}
k
−x
k
)
2
, called the “mean squared error” (“MSE”). In practice, the MSE results in the perception of noise. Therefore, to avoid additional signal imperfections, the MSE should be minimized as much as possible.
There are various types of &Sgr;&Dgr; modulators which approximate and digitize a signal's amplitude. One bit &Sgr;&Dgr; modulators, output two discrete levels of signals, while “multi-bit” &Sgr;&Dgr; modulators output more than two discrete levels of signals. Theoretically, multi-bit &Sgr;&Dgr; modulators out-perform one-bit &Sgr;&Dgr; modulators. In other words, theoretically, the MSE in multi-bit &Sgr;&Dgr; modulators is less than the MSE in one bit &Sgr;&Dgr; modulators. However, practically speaking, multi-bit &Sgr;&Dgr; modulators have complex circuit designs and are sensitive to analog circuit imperfections. “Nth order” &Sgr;&Dgr; modulators include nth order integrators. Once again, the higher the order, the higher the theoretical performance, however, high order &Sgr;&Dgr; modulators, when implemented, have complex circuit designs. The preferred embodiment of the present invention improves the one-bit 2
nd
order &Sgr;&Dgr; modulator.
Prior art versions of &Sgr;&Dgr; modulators were primarily linear and time-invariable. The only exception to the linear constraint was quantization, which was non-linear. Consequently, besides quantization, the building blocks of prior art &Sgr;&Dgr; modulators were limited to linear functions such as delay operators (“D”), constant coefficient multipliers, and signal additions.
Nonlinear circuits add errors to input error signals which human ears detect and can be annoyed by. These error signals are called “harmonics.” A/D conversion requires nonlinear quantization. However, because quantization is incorporated in the feedback process of a &Sgr;&Dgr; modulator, the error that the quantizer generates becomes background noise. Human ears are less sensitive to this background noise. The present invention incorporates this concept.
In conclusion, prior art versions of one-bit 2
nd
order &Sgr;&Dgr; modulators perform with an MSE decay rate of 12 dB/octave, while prior art versions of multi-bit 2
nd
order &Sgr;&Dgr; modulators achieve the preferred 15 dB/octave MSE decay rate. However, multi-bit &Sgr;&Dgr; modulators are more sensitive to analog circuit imperfection and are complex to construct.
What is needed in the art is an improved one-bit &Sgr;&Dgr; modulator, which the present invention provides.
SUMMARY OF THE INVENTION
These and other problems are addressed by the &Sgr;&Dgr; modulator of the present invention. The present invention utilizes the understanding that nonlinear operations incorporated into the feedback process of a &Sgr;&Dgr; modulator generate background noise which is generally acceptable to human ears. The present invention incorporates this understanding in the circuit design of the present invention to emulate a near ideal MSE decay rate. The present invention expands the acceptance of non-linear operations in the &Sgr;&Dgr; modulator's feedback loop by incorporating circuitry to implement the following equations in the &Sgr;&Dgr; modulator's vector quantizer:
Q
(
x
k
, u
k−1
, v
k−1
)=
q
k
[(7−3
|x
k
|)
x
+(6−4
|x
k
|)
u
k−1
+(4−8)|
x
k
|v
k−1
+sign(
x
k
) (4(
x
k
+u
k−1
)
2
−1/12)] (Equation 3)
Q
(
x
k
, u
k−1
, v
k−1
)=
q
k
[(10−4
|x
k
|)
x
k
+(9−6
|x
k
|)
u
k−1
+(6−12
|x
k
|)
v
k−1
] (Equation 4)
Q
(
x
k
, u
k−1
, v
k−1
)=
q
k
[(14
b
−3
|x
k
|)
x
+(12
b
−4
|x
k
|)
u
k−1
+(8
b
−8)|
x
k
|v
k−1
+sign(x
k
) (4(
x
k
+u
k−1
)
2
−b
2
/3)]
(Equation 5)
Q
(
x
k
, u
k−1
, v
k−1
)=
q
k
[(20
b
−4
|x
k
|)
x
k
+(18
b
−6
|x
k
|)
u
k−1
+(12
b
−12
|x
k
|)
v
k−1
] (Equation 6)
The &Sgr;&Dgr; modulator of the present invention reduces circuit complexity by outputting only two discrete signal levels. Consequently, the 2
nd
order &Sgr;&Dgr; modulator of the present invention is a one-bit modulator design. Accordingly, the circuitry involved with the &Sgr;&Dgr; modulator of the present invention is less complex and is less susceptible to analog circuit imperfections. In addition, the &Sgr;&Dgr; present invention achieves the MSE decay rate of prior art multi-bit modulators using only one bit. Thus, the present invention achieves the ideal MSE decay rate of 15 dB/octave without the complex circuitry and increased sensitivity to circuit imperfections when using multi-bits.
As mentioned above, the MSE decay of 12 dB/octave is the limit for prior art one-bit 2
nd
order &Sgr;&Dgr; modulators. This is because the only non-linear operation in prior art &Sgr;&Dgr; modulators was quantization. A linear operation has 3 forms: multiplication by a constant, additions of signals, or delay of a signal. The present invention is a new type of &Sgr;&Dgr; modulator in which both the quantizer and the vector quantizer (“Q”), that includes the quantizer, is non-linear. A quantizer is represented by a comparator in &Sgr;&Dgr; modulator designs. The &Sgr;&Dgr; modulator, according to the present invention, departs from the prior art theory that the quantizer can be the only non-linear function in a &Sgr;&Dgr; modulator. In its novel construction, the present invention includes a vector quantizer that breaks the 12 dB/oct
Mai Lam T.
Research Foundation of the City University of New York
Tokar Michael
LandOfFree
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