One-bit multifunction arithmetic and logic circuit

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307207, G06F 750, H03K 1908

Patent

active

041602900

ABSTRACT:
A one bit multifunction arithmetic and logic circuit is implemented with a pair of inverters, four two input NOR gates, three two-input OR/NOR gates, and two three-input NOR gates. Each of the inverters has four wire OR-able outputs, two of which are inverting and two of which are non-inverting. One input of each of the four two-input NOR gates is coupled to a respective one of four control inputs of the arithmetic and logic circuit; the other input thereof is coupled to respective ones of four wire ORed combinations of the outputs of the first and second inverters. Various outputs of the first, second, third, and fourth two-input NOR gates are wire ORed together. A first one of the three-input NOR gates is responsive to the generate signal, a carry signal, and the wired OR output of the first and second two-input NOR gates. The second three-input NOR gate is responsive to the propagate signal, a carry signal, and the "output disable" input. The first outputs of the first and second three-input NOR gates are wire ORed together to produce a first "sum" output; the second output of the first and second three-input NOR gates are wire ORed together to produce a second sum output which may be used as a wire OR-able "zero result" indicator signal.

REFERENCES:
patent: 3576984 (1971-05-01), Gregg, Jr.
patent: 3584207 (1971-06-01), Huddinge et al.
patent: 3749899 (1973-07-01), Kohoutek et al.
patent: 3767906 (1973-10-01), Pryor
Machart et al., "General Function Circuit", IBM Tech. Disclosure Bulletin, vol. 15, No. 1, Jun. 1972, p. 11.
Bodner et al. "Eight-Bit Arithmetic & Logic Unit"IBM Tech. Disclosure Bulletin, vol. 17, No. 8, Jan. 1975, pp. 2402-2406.

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