One-bit full adder circuit

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364786, G06F 750

Patent

active

044491972

ABSTRACT:
The present invention is a one-bit full adder circuit having a fast carry. The circuit may be implemented using integrated injection logic in which case the circuit comprises six NAND gates and two wired AND gates. Advantageously, there is only a single gate delay in the carry path.

REFERENCES:
patent: 3407357 (1968-10-01), Spandorfer et al.
patent: 3454751 (1969-07-01), Brastins et al.
patent: 3465133 (1969-09-01), Booher
patent: 3978329 (1976-08-01), Baugh et al.
patent: 4071905 (1978-01-01), Oguchi et al.
patent: 4229803 (1980-10-01), Rhodes
Taub, Digital Integrated Electronics McGraw-Hill, Inc. 1977, pp. 164-169.
The TTL Data Book For Design Engineers Second Edition, Texas Instruments, Inc., Oct. 1976, pp. 7-54.

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