Static information storage and retrieval – Addressing – Combined random and sequential addressing
Reexamination Certificate
2006-10-25
2009-02-24
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Addressing
Combined random and sequential addressing
C365S233100, C365S236000, C365S239000, C365S240000
Reexamination Certificate
active
07495993
ABSTRACT:
A semiconductor memory device and an associated method suitable for use in specific applications with predictable memory access pattern, such as in a capsule camera. The memory device takes advantage of the memory access pattern to simplify address processing circuit to realize savings in power and silicon area. Because random access to the semiconductor device is not required, the interface from external to the semiconductor device is also simplified by eliminating at least the address port that is used to specify the memory locations accessed. The method is applicable not only to non-volatile memory technologies (e.g., flash memory), it is also applicable to volatile memory technologies, such as transient charge storage-based memory circuits (e.g., DRAMs) and metastable states-based memory circuits (e.g., SRAMs).
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Capso Vision Inc.
Ho Hoai V
Kwok Edward C.
MacPherson Kwok & Chen & Heid LLP
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