Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Patent
1997-12-05
1999-10-26
Maung, Zarni
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
708211, 708551, 708553, 712222, G06F 700
Patent
active
059744324
ABSTRACT:
A superscalar microprocessor including a floating point unit implements a floating point adder with a leading zero anticipator that predicts the number of leading zeros in the significand sum of the floating point adder. The leading zero anticipator outputs a control signal to a shifter to shift the sum of the significand adder to eliminate the leading zeros. The number of leading zeros is also provided to an exponent circuit that reduces the magnitude of the exponent to reflect the shifted significand. The leading zero anticipator includes a pattern generator that outputs an intermediate pattern with a number of leading zeros approximately equal to the number of leading zeros in the sum. A counter circuit counts the number of leading zeros and provides one or more one-hot control signals to the shifter. In one embodiment, the significand shifter implements two stages of one-hot multiplexers to provide the desired shift. The counter circuit outputs a one-hot course control signal to a first stage multiplexer and a one-hot fine control signal to a second stage multiplexer.
REFERENCES:
patent: 4044338 (1977-08-01), Wolf
patent: 4453212 (1984-06-01), Gaither et al.
patent: 4807115 (1989-02-01), Torng
patent: 4858105 (1989-08-01), Kuriyama et al.
patent: 4926369 (1990-05-01), Hokenek et al.
patent: 4928223 (1990-05-01), Dao et al.
patent: 4941120 (1990-07-01), Brown et al.
patent: 5027308 (1991-06-01), Site et al.
patent: 5053631 (1991-10-01), Perlman et al.
patent: 5058048 (1991-10-01), Gupta et al.
patent: 5129067 (1992-07-01), Johnson
patent: 5136697 (1992-08-01), Johnson
patent: 5204825 (1993-04-01), Ng
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5226130 (1993-07-01), Favor et al.
patent: 5627773 (1997-05-01), Wolrich et al.
patent: 5633819 (1997-05-01), Brashears et al.
patent: 5651125 (1997-07-01), Witt et al.
patent: 5694350 (1997-12-01), Wolrich et al.
patent: 5742537 (1998-04-01), Wolrich et al.
Suzuki, et al, "Leading-Zero Anticipatory Logic for High-Speed Floating Point Addition," IEEE Journal of Solid-State Circuits, vol. 31, No. 8, Aug. 1996, pp. 1157-1164.
Quach, et al, "Leading One Prediction--Implementation, Generalization, and Application," Technical Report, Computer Systems Laboratory, Mar. 1991, pp. 1-11.
Hokenek, et al, "Leading-zero anticipator (LZA) in the IBM RISC System/6000 floating-point execution unit," IBM Journal of Research and Development, vol. 34, No. 1, Jan. 1990, pp. 71-77.
Intel, "Chapter 2: Microprocessor Architecture Overview," 1994, pp. 2-1 through 2-4.
Michael Slater, "AMD's K5 Designed to Outrun Pentium," Microprocessor Report, vol. 8, No. 14, Oct. 24, 1994, 7 pages.
Sebastian Rupley and John Clyman, "P6: The Next Step?," PC Magazine, Sep. 12, 1995, 16 pages.
Tom R. Halfhill, "AMD K6 Takes On Intel P6," BYTE, Jan. 1996, 4 pages.
"Intel Architecture Software Developer's Manual, vol. 1: Basic Architecture", Intel Corporation, Prospect IL, 1996, 1997, Chapter 8: Programming With The Intel MMX.TM. Technology, pp. 8-1 through 8-15.
Holstad, S., "Tutorial Tuesday: Decoding MMX" Jan. 14, 1997, Earthlink Network, Inc. copyright 1997, 5 pages (see http://www.earthlink.net/daily/Tuesday/MMX).
"Intel MMX.TM. Technology--Frequently Asked Questions" 6 pages (see http://www.intel.com/drg/mmx/support/faq/htm).
Advanced Micro Devices , Inc.
Kivlin B. Noel
Maung Zarni
Najjar Saleh
LandOfFree
On-the-fly one-hot encoding of leading zero count does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with On-the-fly one-hot encoding of leading zero count, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and On-the-fly one-hot encoding of leading zero count will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-775617