On screen display processor

Television – Basic receiver with additional function – For display of additional information

Reexamination Certificate

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Reexamination Certificate

active

06417888

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a decoder which converts an encoded video signal, e.g. MPEG-2 encoded video signals, into an output video signal, and more specifically to an on screen display processor of the decoder that scrolls an on screen display.
BACKGROUND OF THE INVENTION
In the United States a standard has been proposed for digitally encoded high definition television signals (HDTV). A guide to the use of this standard entitled, “Guide to the Use of the ATSC Digital Television Standard”, Doc. A/54 (1995), is provided by the Advanced Television Systems Committee (ATSC), and is hereby incorporated by reference. A portion of this standard is essentially the same as the MPEG-2 standard, proposed by the Moving Picture Experts Group (MPEG) of the International Organization for Standardization (ISO). The MPEG-2 standard is described in an International Standard (IS) publication entitled, “Information Technology—Generic Coding of Moving Pictures and Associated Audio, Recommendation H.626”, ISO/IEC 13818-2, IS, 11/94 which is available from the ISO and which is hereby incorporated by reference for its teaching on the MPEG-2 digital video coding standard.
The MPEG-2 standard defines a complex syntax which contains a mixture of data and control information. Some of this control information is used to enable signals having several different formats to be covered by the standard. These formats define images having differing numbers of picture elements (pixels) per line, differing numbers of lines per frame or field, and differing numbers of frames or fields per second. In addition, the basic syntax of the MPEG-2 Main Profile defines the compressed MPEG-2 bit stream representing a sequence of images in five layers, the sequence layer, the group of pictures layer, the picture layer, the slice layer and the macroblock layer. Each of these layers is introduced with control information. Finally, other control information, also known as side information, (e.g. frame type, macroblock pattern, image motion vectors, coefficient zig-zag patterns and dequantization information) are interspersed throughout the coded bit stream.
A decoder decodes the mixture of data and control information and provides a video signal for displaying a video image. An on screen display (OSD) processor of a decoder may be used to provide an OSD in combination with the video image. It is desirable for an OSD have the capability to scroll. In addition, to reduce OSD implementation costs, it is desirable that an OSD processor provide an OSD using existing system resources rather than resources dedicated to implementing an OSD.
SUMMARY OF THE INVENTION
An apparatus for scrolling an on screen display using on screen display data that is included in an encoded video signal representing a video image. The apparatus includes a receiving means to receive the encoded video signal and decode the on screen display data as a sequence of lines of on screen display data. A memory means includes a first buffer and a second buffer. An on screen display processing means stores a group of lines of the sequence of lines of on screen display data in the first buffer and alternately stores successive groups of lines of the sequence of lines of on screen display data in the second buffer and the first buffer, wherein each successive group of lines is shifted by at least one line in the sequence of lines of on screen display data with respect to the previous group of lines. A display means for alternately displaying the on screen display data from the first buffer and the second buffer synchronized with the storage of the successive groups of lines of the sequence of lines of on screen display data in the first and second buffers wherein the most recently stored group of lines is displayed.
According to one aspect of the invention, the on screen display may be scrolled up or down by shifting each successive group of lines forward or backward, respectively, along the sequence of lines of on screen display data.
According to another aspect of the invention, rather than using a first buffer and a second buffer, the memory means includes a plurality of storage regions. The on screen display processing means forms a linked list of a group of the storage regions. The linked list of storage regions has a first region and last region. A group of lines of the sequence of lines of the on screen display data is stored in the linked list of storage regions. On screen display data corresponding to at least one successive line of on screen display data along the sequence of lines of on screen display data is then stored in one of the plurality of storage regions not currently in the linked list which is identified as the new link. The first region and the last region of the linked list are then shifted to add a region and delete a region from the group of storage regions in the linked list so the added region is the new link. The display means displays the group of lines of on screen data stored in the linked list. The on screen display is scrolled up and down by having the new link include the next or previous, respectively, successive line along the sequence of lines of on screen display data.
According to one aspect of the invention, the encoded video signal is an MPEG-2 bitstream and the on screen display data includes closed caption information which is encoded within a user data field of a sequence header, a group of pictures header, or a picture header.


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IBM Technical Disclosure Bulletin, vol. 32, No. 1, Jun. 1989, “Smooth Scroll Using Dual Port Dram”.
Winzker et al. “Architecture and Memory Requirements for stand-alone and hierarchical MPEG2 HDTV-Decoders with Synchronous DRAMs”IEEEApr. 30, 1995, pp 609-612.

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