On screen display arrangement for digital video signal processin

Television – Basic receiver with additional function – For display of additional information

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348584, 348589, H04N 5262

Patent

active

055349420

ABSTRACT:
A digital video signal processing system receives encoded packets of data representing video image information in compressed form. A video decoder and an associated video RAM are used to decode and decompress the video packets to form groups of video image representative digital words. The video decoder also includes an on-screen display (OSD) unit which converts a graphics bit map stored in a section of the video RAM to groups of graphic image representative digital words. The image representative digital words and the graphic representative digital words are multiplexed together under the control of the OSD display unit.

REFERENCES:
patent: 4680629 (1987-07-01), Fukushima et al.
patent: 4768083 (1988-08-01), Romesburg
Document identified as "Schematic PIP Module--TCE IMC Chassis".
"Apple II, Reference Manual" Apple Computer Inc., 10260 Bandley Dr., Cupertino, CA 95014, Cover pp. + pp. 12, 13, 18, 19, 20, 21, 68, 69, 130 & 131.
"PIP 2250 Picture-in-Picture Processor", ITT Semiconductors ITT, Edition 1988/1989 Cover pp. + contents pp. and pp. 3 & 4.

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