On die termination mode transfer circuit in semiconductor...

Details On die termination mode transfer circuit in semiconductor... On die termination mode transfer circuit in semiconductor...

2007-03-27

2007-03-27

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S229000

Reexamination Certificate

active

10879650

ABSTRACT:
An on die termination (ODT) mode transfer circuit, for use in a semiconductor memory device, including: a delay locked loop (DLL) for receiving an external clock signal in order to generate a DLL clock signal according to a power down mode and an active-standby mode; an ODT mode signal generation means for generating an ODT mode signal in response to the DLL clock signal and a clock enable signal; and an ODT control means for generating a termination resistor (RTT) signal in response to an ODT signal and the ODT mode signal.

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patent: 6699734 (2004-03-01), Schoenfeld et al.
patent: 2003/0235107 (2003-12-01), Jang
patent: 2004/0080322 (2004-04-01), Braun et al.
patent: 2004/0100837 (2004-05-01), Lee
patent: 2004/0141391 (2004-07-01), Lee et al.

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