On-die detection of the system operation frequency in a DRAM...

Details On-die detection of the system operation frequency in a DRAM... On-die detection of the system operation frequency in a DRAM...

2006-01-10

2006-01-10

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S210130, C365S189070, C365S236000, C365S063000

Reexamination Certificate

active

06985400

ABSTRACT:
The present invention relates to a memory system including an external clock and a memory chip connected to the external clock. The external clock generates an operating signal at an operating frequency that controls at least one electrical component of the memory system. The memory chip includes a frequency detector that detects at least a range of frequency values for the operating frequency. Further, the frequency detector includes a reference frequency generator that generates a reference signal at a reference frequency.

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