On-chip structure for electrostatic discharge (ESD) protection

Details On-chip structure for electrostatic discharge (ESD) protection On-chip structure for electrostatic discharge (ESD) protection

2007-04-10

2007-04-10

Pert, Evan (Department: 2826)

Semiconductor device manufacturing: process

Making regenerative-type switching device

C257S173000, C257S174000, C257S362000, C257SE29181, C438S140000

Reexamination Certificate

active

11032154

ABSTRACT:
A complementary SCR-based structure enables a tunable holding voltage for robust and versatile ESD protection. The structure are n-channel high-holding-voltage low-voltage-trigger silicon controller rectifier (N-HHLVTSCR) device and p-channel high-holding-voltage low-voltage-trigger silicon controller rectifier (P-HHLVTSCR) device. The regions of the N-HHLVTSCR and P-HHLVTSCR devices are formed during normal processing steps in a CMOS or BICMOS process. The spacing and dimensions of the doped regions of N-HHLVTSCR and P-HHLVTSCR devices are used to produce the desired characteristics. The tunable HHLVTSCRs makes possible the use of this protection circuit in a broad range of ESD applications including protecting integrated circuits where the I/O signal swing can be either within the range of the bias of the internal circuit or below/above the range of the bias of the internal circuit.

REFERENCES:
patent: 5719733 (1998-02-01), Wei et al.
patent: 5903420 (1999-05-01), Ham
patent: 6281527 (2001-08-01), Chen
patent: 6498357 (2002-12-01), Ker et al.
patent: 6770918 (2004-08-01), Russ et al.

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