On-chip packet-switched communication system

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S392000, C370S407000, C370S409000

Reexamination Certificate

active

07555001

ABSTRACT:
A system for routing a data packet between N elements includes N network interfaces respectively connected to the N elements, with N being an even integer, and an on-chip packet-switched communication network arranged in a ring structure. The packet-switched communication network includes N routers respectively connected to the N interfaces, and N pairs of opposite uni-directional ring links. Each pair of ring links couples two adjacent routers in the ring structure, and each ring link provides two virtual channels. There are N/2 pairs of opposite uni-directional crossing links, with each pair of crossing links coupling two diametrically opposite routers in the ring structure. Processing circuitry is distributed within the N routers and the N network interfaces for determining direction of the data packet to be transmitted over a path from a source element to a destination element in the ring structure, and for determining at each router in the path which virtual channel is to be used to avoid deadlocks in the transmission.

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patent: 7307947 (2007-12-01), Okuno
patent: 1257100 (2002-11-01), None
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Ye et al., Packetization and Routing Analysis of On-Chip Multiprocessor Networks, Journal of Systems Architecture, Elsevier Science Publishers Bv., Amsterdam, NL, vol. 50, No. 2-3, Feb. 2004, pp. 81-104.
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