On-chip local area network

Details On-chip local area network On-chip local area network

1999-10-08

2004-07-27

Kizou, Hassan (Department: 2662)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S908000, C709S250000

Reexamination Certificate

active

06768742

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor computer chips, and more particularly, to a computer chip having on-chip internetworked modules and implementing all or a portion of a local area network for on-chip or off-chip data transfers.
2. Description of the Related Art
Computer systems have traditionally comprised a system unit or housing which comprises a plurality of electrical components comprising the computer system. A computer system typically includes a motherboard, which is configured to hold the microprocessor and memory, and one or more buses used in the computer system. The motherboard typically comprises a plurality of computer chips or electrical components including intelligent peripheral devices, bus controllers, processors, bus bridges etc.
More recently, computer systems are evolving toward an integration of functions into a handful of computer chips. This coincides with the ability of chipmakers to place an increasingly large number of transistors on a single chip. For example, currently, chip manufacturers are able to place up to ten million transistors on a single integrated circuit or monolithic substrate. It is anticipated that within several years chipmakers will be able to place one billion transistors on a single chip. Thus, computer systems are evolving toward comprising a handful of computer chips, where each computer chip comprises a plurality of functions. The integration of a plurality of modules or functions on a single computer chip and the need for maximized throughput requires a new approach to on-chip data transfer.
Modern integrated circuits may include numerous functional units on-chip, e.g., a memory, a processor, an I/O controller, a task-specific hybrid, a task-general hybrid etc. During on-chip data transfer, one or more of these functional units may be accessed more frequently than other remaining functional units. A simple, point-to-point, dedicated communication between any two of the functional units may not always suffice. To cope with the uncertainties of module usage and varying module cluster designs, a scheme to accomplish on-chip data transfer with reduced inter-module physical connections is desired.
SUMMARY OF THE INVENTION
The computer chip according to one aspect of the present invention includes one or more modules interconnected through a plurality of on-chip packet-switched local area networks or LANs. These LANs may be organized in an Ethernet, a Token-Ring, a FDDI (Fiber Distributed Data Interface) or any other serial or parallel network configuration. The familiar Internet topology may be implemented on-chip with each module being treated as a “host.” One or more network interconnects may be provided to interconnect the plurality of local area networks. Each module may be assigned, preferably during chip fabrication, an internetworked-chip module address or ICMA. This ICMA may be analogized to the conventional IP address assigned to a host in the Internet.
The computer chip implements a network protocol for on-chip and, preferably, off-chip data transfers. The computer chip may use one of a plurality of network addressing schemes to identify numerous modules on the chip. The network address may be a traditional IP address or the given ICMA, for example. The computer chip, hence, may itself be treated as an Internet. This chip configuration functions as a local on-chip internet, and may additionally include conventional internet elements such as DNS servers, WINS servers, backbones etc. This methodology allows flexible chip architecture in that the computer chip may have modules clustered conveniently according to, for example, functionality and the various modules may interact with one another without overburdening the chip packing density.
Each module in the computer chip is configured to convert a data block into one or more data packets or convert a plurality of data blocks into a single packet, and then send each data packet to one or more of the other modules in the internetworked-chip using a network protocol, for example, the TCP/IP protocol. One or more modules may operate as a “DNS server” and have a built-in ICMA dictionary for the modules on the chip, or each LAN may be configured to handle ICMA configuration during data transfer between two or more modules. In one embodiment, an ICMA may include a plurality of network identifier bits to identify the data packet originating or destination network. The ICMA may further include a plurality of module identifier bits to identify the specific module in a network that is originating or receiving the given data packet. The data path from one module to the other one may include a number of routers, and may not have the same path for each such data transmission from one module to the other. The routers may be configured to handle data packet traffic using principles of packet-switched communication, thus expediting data flow and reducing latency or backlog in the internetworked-chip.
In another embodiment, the internetworked computer chip may be a portion of a LAN extending off-chip as well as on-chip. A network interconnect may be configured to detect any misdirected or improperly addressed data communication between the parts of the LAN, and then, may facilitate the proper communication through corrected ICMAs. The network interconnect may be coupled to an external LAN segment to facilitate a data communication between the computer chip of the present invention and another similar chip or device on the LAN. The network interconnect may have its own ICMA. When more than one such internetworked chips are included in the computer system, then each port controller may have a different ICMA, although different modules in different such internetworked chips may have same ICMAs. The network interconnect, additionally, may implement a dynamic network addressing protocol, e.g., (DHCP) to allow automatic allocation of an ICMA for a module. This allows added flexibility when upgrading specific modules in the computer chip, or when the chip is transported to a different computer system environment.


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