On-chip jitter measurement circuit

Details On-chip jitter measurement circuit On-chip jitter measurement circuit

2003-08-11

2008-10-21

Nguyen, Vincent Q (Department: 2831)

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

Phase comparison

C324S076550, C375S371000, C331S00100A

Reexamination Certificate

active

07439724

ABSTRACT:
An on-chip jitter measurement circuit and corresponding method are provided for receiving a reference clock and a signal of interest, including a latch for comparing the arrival time of the signal of interest to the reference clock, a delay chain in signal communication with the reference clock for varying the arrival time of the reference clock, the delay chain having a first stage, a middle stage, and a last stage, a voltage controller in signal communication with the middle stage of the delay chain for controlling the delay of the arrival time of the reference clock while permitting the first and last stages of the delay chain to retain a full voltage swing independent of the delay.

REFERENCES:
patent: 5889435 (1999-03-01), Smith et al.
patent: 2003/0223526 (2003-12-01), Sorna
patent: 2005/0024037 (2005-02-01), Fetzer

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