On-chip frequency degradation compensation

Details On-chip frequency degradation compensation On-chip frequency degradation compensation

2008-07-01

2008-07-01

Tang, Minh N (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010

Reexamination Certificate

active

07394274

ABSTRACT:
Embodiments of the invention include a trio of reliability oscillators. In one embodiment, an on-chip frequency compensation circuit includes a selectively enabled reliability oscillator to generate a reference oscillating signal, a clocked reliability oscillator to generate an AC degraded oscillating signal, and a static reliability oscillator to generate a DC bias degraded oscillating signal. A compare circuit coupled to the reliability oscillators compares the oscillating signals and generates a frequency compensation signal if the comparison determines that there is frequency degradation greater than a predetermined threshold.

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Office Action mailed Apr. 18, 2006 in co-pending U.S. Appl. No. 10/745,427.

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