Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1993-06-11
1994-10-11
Hille, Rolf
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257744, 257751, H01L 2946, H01L 21285, H01L 23485
Patent
active
053550218
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to ohmic contacts for p-type GaAs devices.
2. Discussion of the Prior Art
GaAs is a preferred material for manufacture of high speed devices such as bipolar transistors, heterojunction bipolar transistors, and p-i-n diodes. P-type GaAs and GaAlAs are often used as thin layers in multilayer devices. This means that in addition to requiring low contact resistance, in order to maximise efficient use of the higher operating speeds possible for devices made of such materials, it is also preferable to keep contact alloying heat treatment temperatures low so that inter-layer and intra-layer diffusion is minimised.
R C Brooks et al (IEEE Elect. Dev. Lett. Vol. EDL-6(10) p525 1985) detail typical specific contact resistance values of ohmic contacts for p-type GaAs using a Zn/Pd/Au metallisation. However, although specific contact resistances as low as 7.times.10.sup.-7 .OMEGA..cm.sup.2 were achieved in material with 2.times.10.sup.19 cm.sup.-3 doping, the heat treatment temperatures needed for these values were in the range of about 420.degree. C.-490.degree. C.
In 1989 Yicheng Lu et al (J. Electrochem. Soc., Vol. 136, (10), p3123, 1989) used p-type GaAs (3.times.10.sup.17 cm.sup.-3) and Au/Zn/Au contacts to achieve specific contact resistivity of 3.3.times.10.sup.-6 .OMEGA..cm.sup.2. This value does not at first appear to be as good as that given by Brooks et al (Supra). However, it must be noted that these contacts are made on much lower doped material. As a general rule, the higher the material doping then the lower the value of contact resistance. Also, the specific contact resistivity of 3.3.times.10.sup.-6 .OMEGA..cm.sup.2 is corrected for sheet resistance, whereas no correction was given by Brooks et al. With no correction, then the specific contact resistance is better than the values obtained by Brooks et al.
In order to achieve the optimum contact resistivity Yicheng Lu used a two stage heat treatment process of preheating at 350.degree. C. for 15 seconds followed by a rapid thermal anneal at 450.degree. C. for 5 seconds.
Alternatively, C Dubon-Chevalier et al (J. Appl. Phys. 59(11), p3783, 1986) used AuMn as ohmic contacts. In the doping range of 10.sup.18 to 10.sup.19 cm.sup.-3 the specific contact resistivities varied between 10.sup.-5 and 2.times.10.sup.-7 .OMEGA..cm2 respectively. The contacts had all undergone contact alloying heat treatments at 450.degree. C.
Most recently R Bruce et al. (J of Electr Mats 19 (3) p225 1990) reported a low resistance Pd/Zn/Pd/Au ohmic contact for p-type GaAs. The contacts were formed by the sequential electron-beam evaporation of 10 nm Pd, <5 nm Zn, 20 nm Pd and 40 nm Au layers on GaAs with a doping level of 5.times.10.sup.18 cm.sup.-3. Minimum contact resistance of 0.04 .OMEGA..mm (contact resistivity of <1.times.10.sup.-7 .OMEGA..cm.sup.2) was obtained from such Pd/Zn/Pd/Au contacts which had been annealed at 500.degree. C. for 30 seconds.
SUMMARY OF THE INVENTION
It is the object of this invention to provide a low contact resistance ohmic contact for p-type GaAs which may be made using low contact alloying heat treatment temperatures.
According to this invention an ohmic contact for p-type GaAs comprises: between 3 nm and 15 nm, a Zn layer with a depth of between 5 nm and 40 nm, a second Pd layer with a depth of greater than about 50 nm and a Au layer with a depth of greater than about 300 nm.
Preferably the second palladium (Pd) layer has a depth of between about 50 nm and about 200 nm. It is thought that the second Pd layer provides a gold (Au) diffusion barrier.
The Au layer is thought to provide a ceiling layer, and thus is not expected to have any maximum depth. Such a ceiling layer has a minimum depth of about 300 nm. Practical maximum depths of the Au layer are normally dictated by constraints of material cost and production cost, with a maximum Au layer depth of 600 nm being a typical expected maximum.
The preferred layer construction has a first palladium (Pd) layer dep
REFERENCES:
patent: 4395727 (1983-07-01), Lauterbach
Journal of Electronic Materials, vol. 19, No. 3, 1990, Bruce et al, "Low Resistant Pd/Zn/PdAu Ohmic Contacts of P-Type GaAs", pp. 225-229.
Materials Letters, vol. 8, No. 10, Oct. 1989, Ivey et al: "Expitaxially Grown PdzInP on InP" pp. 389-395.
Journal of Applied Physics, vol. 59, No. 10, May 1986, Kobayashi et al "An Atomistic Study Of The GaAs-Pd Interface"pp. 3448-3453.
Journal of Electronic Materials, vol. 20, No. 3, 1991, Ivey et al "Pd/Zn/Pd/Au Ohmic Contacts to P-Type GaAs" pp. 237-246.
Crouch Mark A.
Gilbey William H.
Gill Suhkdev S.
Pryce Graham J.
Brown Peter Toby
Hille Rolf
The Secretary of State for Defence in Her Britannic Majesty's Go
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