Offset voltage trimming circuit

Amplifiers – With semiconductor amplifying device – Including current mirror amplifier

Reexamination Certificate

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C330S256000

Reexamination Certificate

active

06285258

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to an offset voltage trimming circuit, and more particularly, to an offset voltage trimming circuit for adjusting the offset voltage of a sense amplifier circuit for amplifying and outputting a differential voltage of an input voltage.
2. Description of the Related Art
Conventionally, a sense amplifier circuit offset voltage trimming circuit like that shown in
FIG. 2
is known. In
FIG. 2
, input signals applied to a pair of input terminals
10
,
11
are supplied to the bases of npn transistors Q
1
, Q
2
which together comprise the differential circuit (sense amplifier circuit). The emitters of transistors Q
1
, Q
2
are jointly connected and grounded via a constant-current source
12
.
The respective collectors of the transistors Q
1
, Q
2
are connected to both ends of a resistor R
3
that determines the gain and at the same time are connected to one end of each of trimming resistors R
1
, R
2
that adjust the offset voltage. The remaining ends of trimming resistors R
1
, R
2
are connected to a pair of output terminals
13
,
14
, respectively, and, at the same time, are connected to power supplies Vcc via constant-current sources
15
,
16
.
By connecting in series diffused resistors Ra
1
through Ran which have been shorted across both ends with aluminum wiring
17
and then using a laser to remove the points on the aluminum wiring marked with an “X” as shown in
FIG. 3
, the trimming resistors R
1
, R
2
shown in
FIG. 2
can adjust the resistance value. By adjusting this resistance value, the offset voltage for the transistors Q
1
, Q
2
is adjusted so that the output voltage between the pair of output terminals
13
,
14
becomes zero when the voltage between the pair of input terminals
10
,
11
is zero.
Conventionally, the circuit shown in
FIG. 4
has been used as constant-current sources
15
,
16
. In
FIG. 4
the base of npn transistor Q
11
is grounded via resistor R
11
, the emitter is grounded and the collector is connected to the power supply Vcc via resistor R
12
. Additionally, the emitter of npn transistor Q
12
is connected to the base of transistor Q
11
and the base of npn transistor Q
12
is connected to the collector of transistor Q
11
, with the collector of npn transistor Q
12
acting as the current output terminal
20
.
If the voltage at both ends of resistor R
11
is V
A
(with V
A
being equivalent to a forward voltage drop V
BE
between the base and the transmitter of transistor Q
11
), then the output current I
o
at the current output terminal described above can be described as follows:
I
o
=V
A
/R11  (1)
It should be noted that trimming resistors R
1
, R
2
have positive temperature characteristics. That is, when the temperature rises the resistance increases. By contrast, in the constant-current source circuit shown in
FIG. 4
the temperature characteristics of the output current I
o
is expressed in the following formula:
I
o
/

T
=
(

V
A
/

T
-
I
o


R



11
/

T
)
/
R



11


V
A
/

T

(
1
/
R



11
)

-
2
/
R



11

[
mV
/
°



C
.
]
(
2
)
T represents temperature, d represents the amount of increase, dV
A
/dT>>I
o
dR
11
/dT and dV
A
/dT is equivalent to the forward voltage drop V
BE
between the base and emitter of transistor Q
11
, so the output current I
o
has a temperature characteristic of approximately −2[mV/° C.].
It should be noted that, in contrast to the trimming resistors R
1
, R
2
which have positive temperature characteristics, the constant-current sources
15
,
16
have negative temperature characteristics that cancel out the positive temperature characteristics of the trimming resistors.
However, it is difficult to make the two temperature characteristic absolute values equivalent and, as a result, a problem arises in that the offset voltage for transistors Q
1
, Q
2
changes as the temperature changes.
SUMMARY OF THE INVENTION
Accordingly, it is the object of the present invention to provide an offset voltage trimming circuit in which the problem described above is solved. Specifically, it is the object of the invention to provide an offset voltage trimming circuit that prevents the offset voltage for the transistors Q
1
, Q
2
from changing as the temperature changes.
The above-described object of the present invention is achieved by an offset voltage trimming circuit for sending a current from a constant-current source to a trimming resistor and thus obtaining an offset voltage, the offset voltage trimming circuit comprising:
a Zener diode with a temperature characteristic of zero;
a transistor connected so as to form a diode and connected in series to the Zener diode;
a current-mirror circuit connected to the transistor; and
a second resistor connected in series to the current-mirror circuit and having a temperature characteristic identical to that of the trimming resistor,
the current being supplied to the trimming resistor from the current-mirror circuit.
The above-described object of the present invention is also achieved by an offset voltage trimming circuit comprising:
a differential amplifier circuit outputting an offset voltage;
a trimming resistor connected to the differential amplifier circuit; and
a pair of constant-current sources connected to the differential amplifier circuit, each of the pair of constant-current sources comprising:
a Zener diode with a temperature characteristic of zero;
a transistor connected so as to form a diode and connected in series to the Zener diode;
a current-mirror circuit connected to the transistor; and
a second resistor connected in series to the current-mirror circuit and having a temperature characteristic identical to that of the trimming resistor,
the current being supplied to the trimming resistor from the current-mirror circuit.
According to the invention described above, the temperature characteristics of the resistor and the trimming resistor cancel each other out and changes in voltage caused by changes in temperature can be prevented.


REFERENCES:
patent: 4038607 (1977-07-01), Schade, Jr.
patent: 4454416 (1984-06-01), Gontowski, Jr. et al.
patent: 4485313 (1984-11-01), Nagano
patent: 4611178 (1986-09-01), Naylor et al.
patent: 4612496 (1986-09-01), Hines
patent: 6049253 (2000-04-01), Takayama
patent: 6097254 (2000-08-01), Yamamoto

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