Offset voltage correction circuit for multiple video channel ima

Details Offset voltage correction circuit for multiple video channel ima Offset voltage correction circuit for multiple video channel ima

1975-01-09

1976-02-10

Mayer, Albert J.

Telegraphy

Systems

Simplex-reversing periodic

357 24, 328163, 178DIG26, H04N 316, H01L 2978, H03B 100

Patent

active

039378748

ABSTRACT:
An imaging system comprising an array of sensing sites of MIS cell pairs which are arranged in a matrix of rows and columns; a plurality of column conductor lines arranged in a plurality of consecutively numbered sets, each set including the same number of consecutively numbered lines; a plurality of charge integrating means, each being connected to a respective column line of each set for simultaneous readout of an induced current through the column lines of a set; a plurality of video channel circuit respectively in circuit with each of the integrating means; switch means for connecting each set, in turn, for readout; and a correction circuit means connected in circuit with each said plurality of video channel circuit means for generating a correction signal to cancel the D.C. offset voltage between the outputs of said video channels.

REFERENCES:
patent: 3653014 (1972-03-01), List et al.
patent: 3786263 (1974-01-01), Michon
patent: 3801820 (1974-04-01), Eichelberger et al.
patent: 3819953 (1974-06-01), Puckette et al.

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