Amplifiers – Modulator-demodulator-type amplifier
Reexamination Certificate
2011-04-12
2011-04-12
Pascal, Robert (Department: 2817)
Amplifiers
Modulator-demodulator-type amplifier
C330S009000
Reexamination Certificate
active
07924089
ABSTRACT:
A class D amplifier includes an input unit that inputs an input signal and an integrator which includes a differential operational amplifier having an offset voltage correction function. The integrator integrates the input signal input. A pulse-width modulator modulates the integration result of the integrator to generate a pulse signal having a pulse width reflective of the integration result. An output unit outputs the pulse signal. A feedback unit superimposes a signal output from the output unit on the input signal and feeds back the superimposed signal to the integrator. An input controller selectively set the input unit to a state where no signal is input. An output controller sets a voltage of an output from the feedback unit to a constant voltage.
REFERENCES:
patent: 4717888 (1988-01-01), Vinn et al.
patent: 4806875 (1989-02-01), Schaffer
patent: 5061900 (1991-10-01), Vinn et al.
patent: 5548241 (1996-08-01), McClure
patent: 5550512 (1996-08-01), Fukahori
patent: 5812005 (1998-09-01), Ezell et al.
patent: 6114907 (2000-09-01), Sakurai
patent: 7095275 (2006-08-01), Miyazaki
patent: 7167046 (2007-01-01), Maejima
patent: 59-144209 (1984-08-01), None
patent: 02-185106 (1990-07-01), None
patent: 6-41382 (1994-10-01), None
patent: 08-037430 (1996-06-01), None
patent: 09-246885 (1997-09-01), None
patent: 2000-183671 (2000-06-01), None
patent: 2004120102 (2004-04-01), None
patent: 2004527179 (2004-09-01), None
patent: 2006042296 (2006-02-01), None
patent: 20050001317 (2005-01-01), None
patent: WO 02/087073 (2002-10-01), None
Japanese Patent Office “Notification of Reasons for Refusal” Japanese Patent Application No. 2006-188624, Drafting Date Jun. 6, 2008, 2 pages.
Japanese Patent Office “Notification of Reasons for Refusal” Japanese Patent Application No. 2006-188657, Drafting Date Jul. 4, 2008, 2 pages.
Korean Patent Office “Notice of Preliminary Rejection” Patent Application No. 10-2007-0068310, Issued Sep. 29, 2008, 4 pages.
Japanese Patent Office “Notification of Reasons for Refusal” Japanese Patent Application No. 2006-188624, Drafting Date Jan. 20, 2009, 3 pages.
Japanese Patent Office “Notification of Reasons for Refusal” Japanese Patent Application No. 2006-188624, Drafting Date Sep. 11, 2009, 3 pages.
Japanese Patent Office “Notification of Reasons for Refusal” Japanese Patent Application No. 2006-188624, Drafting Date Jun. 14, 2010, 2 pages.
Kawai Hirotaka
Tanaka Yasuomi
Tsuji Nobuaki
Nguyen Khiem D
Pascal Robert
Pillsbury Winthrop Shaw & Pittman LLP
Yamaha Corporation
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