Optical: systems and elements – Deflection using a moving element – Using a periodically moving element
Reexamination Certificate
2002-12-27
2003-12-30
Le, Dinh T. (Department: 2816)
Optical: systems and elements
Deflection using a moving element
Using a periodically moving element
C327S074000
Reexamination Certificate
active
06671075
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an offset voltage cancellation circuit for removing an offset voltage included in a differential signal that is output, using radio communication, by the detection circuit of a reception apparatus.
This application is counterparts of Japanese patent applications, Serial Number 182527/2002, filed June 24, the subject matter of which is incorporated herein by reference.
2. Related Arts
FIG. 2
is a diagram showing an example configuration for a conventional offset voltage cancellation circuit.
An offset cancellation circuit
90
comprises peak detectors
91
and
92
for respectively detecting, in differential input signals VA
1
and VA
2
received from a detection circuit
1
, peak voltages VP
1
and VP
2
; and resistors
93
and
94
for outputting, as a reference voltage VREF, an intermediate potential between the differential input signals VA
1
and VA
2
.
The peak detectors
91
and
92
, which are constituted by a voltage follower and a voltage retention capacitor, can immediately detect and cope with a rise in an input voltage and can store the maximum voltage attained. Then, when thereafter the input voltage is reduced, in congruity with a large time constant, the peak detectors
91
and
92
gradually discharge down the voltages they have stored to insure the performance of a stable operation.
The offset voltage cancellation circuit
90
also comprises: an adder
95
for adding the differential input signal VA
1
to the peak voltage VP
2
,.while using as a reference the reference voltage VREF, and outputting a differential output signal VC
1
; and an adder
96
for adding the differential input signal VA
2
to the peak voltage VP
1
, while using as a reference the reference voltage VREF, and outputting a differential output signal VC
2
.
Assume that the differential input signals VA
1
and VA
2
, represented by equation (1), are provided for the offset voltage cancellation circuit
90
.
VA
1
=
VO
1
+
A
sin(&ohgr;
t
)
VA
2
=
VO
2
−
A
sin(&ohgr;
t
) . . . (1)
It should be noted that VO
1
and VO
2
denote the direct-current voltages elements of the differential input signals VA
1
and VA
2
, and A denotes the amplitude for the alternating-current elements of the differential input signals VA
1
and VA
2
.
Then, the peak voltages VP
1
and VP
2
output from the peak detectors
91
and
92
and the reference voltage VREF generated by the resistors
93
and
94
are represented in equation (2) as follows.
VP
1
=
VO
1
+
A
VP
2
=
VO
2
+
A
VREF
=(
VO
1
+
VO
2
)/2 . . . (2)
The differential input signal VA
1
, the peak voltage VP
2
and the reference voltage VREF are transmitted to the adder
95
and the differential input signal VA
2
, the peak voltage VP
1
and the reference voltage VREF are transmitted to the adder
96
, and the respective signals and data are added together at the adders
95
and
96
.
As a result, the respective differential output signals VC
1
and VC
2
output by the adders
95
and
96
are represented by equation (3) as follows.
VC
1
=
VA
1
+
VP
2
−
VREF=A
sin (&ohgr;
t
)+
A
+(
VO
1
+
VO
2
)/2
VC
2
=
VA
2
+
VP
1
−
VREF=−A
sin (&ohgr;
t
)+
A
+(
VO
1
+
VO
2
)/2 . . . (3)
As is shown in equation (3), the differential output signals VC
1
and VC
2
have the same number of constant terms. This means that the direct-current voltage elements included in the differential output signals VC
1
and VC
2
are equal, and that the offset voltage is removed.
However, with the conventional offset voltage cancellation circuit the following problem is encountered.
The time-sharing communication for alternately changing the transmission state and the reception state is frequently employed for a radio communication system. As a time elapses, the signal received by this system is changed to a silent signal that includes only a noise element, a non-modulated carrier wave signal, a preamble signal or a modulated carrier wave signal. The direct-current voltage elements, which are included in the differential input signals VA
1
and VA
2
received from the detection circuit
1
, differ, depending on the operating condition, and an offset voltage is generated in accordance with the direct-current voltage element.
In the offset voltage cancellation circuit in
FIG. 2
, the peak voltages
91
and
92
detect the peak voltages VP
1
and VP
2
of the differential input signals VA
1
and VA
2
, and these peak voltages VP
1
and VP
2
are stored in capacitors (not shown). The voltages stored in the capacitors can immediately catch up with a rise in the peak voltages; however, when the peak voltages are reduced, the voltages stored in the capacitors are changed, in congruity with a large time constant, in order to ensure a stable operation is performed.
Therefore, when the potentials of the differential input signals VA
1
and VA
2
are temporarily increased due to a state change or a momentary noise, the retained peak voltages VP
1
and VP
2
are replaced by potentials having abnormal values, so that there are differences between them and the actual peak voltages. Thus, the peak voltages VP
1
and VP
2
retained by the peak detectors
91
and
92
do not match the values represented by equation (2), and the resulting offset between the differential output signals VC
1
and VC
2
prevents data from being received correctly.
SUMMARY OF THE INVENTION
To resolve the problem presented by the conventional technique, it is one objective of the present invention to provide an offset voltage cancellation circuit that can quickly cope with a state change, and can cancel an offset voltage between differential input signals.
To achieve this objective, according to a first aspect of the present invention, an offset voltage cancellation circuit, which removes a difference between direct-current voltage element included in first and second differential input signals, and generates a differential signal including first and second output signals, comprises: first and second peak detectors; first and second adders; and a peak level reset unit, all of which are described below.
The first peak detector includes a first capacitor for storing the peak level of the first input signal. The first peak detector outputs voltage corresponding to a charge stored in the first capacitor as a first peak voltage. The first peak detector also discharges a charge stored in the first capacitor in response to a reset signal. The second peak detector includes a second capacitor for storing the peak level of the second input signal. The second peak detector outputs a voltage corresponding to a charge stored in the second capacitor as a second peak voltage, and discharges a charge stored in the second capacitor in response to the reset signal.
The first adder adds the first input signal to the second peak voltage to generate the first output signal, and the second adder adds the second input signal to the first peak voltage to generate the second output signal. The peak level reset unit outputs the reset signal corresponding to a potential difference between the first and second output signals.
According to a second aspect, an offset voltage cancellation circuit comprises: the first and second peak detectors and the first and the second adders, which are the same as those in the first aspect; a reset controller which monitors the peak voltages of the first and second output signals and which outputs a reset enable signal when a difference between said peak voltages exceeds a predetermined level a reset controller; and a peak level reset unit which outputs the reset signal corresponding to a potential difference between the first and the second output signals when the reset enable signal is received thereto.
According to a third aspect of the present invention, an offset voltage cancellation circuit comprises: the first and second peak detectors and t
Le Dinh T.
Oki Electric Industry Co. Ltd.
Rabin & Berdo P.C.
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