Offset error compensation of input signals in...

Details Offset error compensation of input signals in... Offset error compensation of input signals in...

2001-07-25

2002-08-13

Young, Brian (Department: 2819)

Coded data generation or conversion

Converter compensation

C341S155000

Reexamination Certificate

active

06433712

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a method and circuit for compensating an offset component of an input signal (also referred to as a measurement signal) applied to an input of an analog-to-digital converter (ADC). The invention also relates to a method and circuit for compensating an offset component of an input signal applied to an input of a successive approximation register (SAR) ADC, or to compensating an offset component of an input signal applied to an input of any other type of switched capacitor ADC, such as a delta-sigma ADC, pipeline ADC, etc.
In most cases, an analog input signal applied to the input of an ADC is a non-ideal signal. Typically, such an analog input signal includes an offset component that occurs as a result of non-ideal behavior of a sensor, transducer, or other interface circuit generating the analog signal. For example, an analog signal produced by a bridge circuit, Hall effect sensor or the like, or an analog encoder, is likely to have a substantial offset voltage. The polarity of the offset voltage applied to the input of analog digital converter may not be certain.
The offset component of the analog signal can be caused by temperature drift of the sensor or transducer. Or, the offset component of the analog signal can be caused by a front-end buffer amplifier producing the analog signal in response to the signal produced by a sensor or other circuit. The construction of a sensor itself can be a source of the offset component of the analog input signal applied to the input of the ADC. For example, an analog signal produced by a magnetic sensor may include an offset component caused by magnetization of the magnetic circuit. Even though modern design of various sensors and associated front-end electronics (such as buffer amplifiers) tends to minimize the magnitude of the offset component of the measurement signal, the offset component nevertheless often is sufficiently large to be problematic, for example, by masking or obstructing useful signal information contained in the measurement signal.
Consequently, numerous software techniques and hardware techniques have been developed to extract useful signal information from the measurement signal. Typical hardware techniques include compensating the offset component error to provide a “clean” analog signal to the input of the ADC, but this solution to the problem may not be cost-effective because of the cost of additional circuit components. Software solutions of the problems caused by offset components generally require more computing time by a digital signal processor (DSP) or microcontroller or the like (e.g., to measure the value of a positive peak (such as V
+
in
FIG. 9
) and the value of a negative peak (such as V
−
in
FIG. 9
) of the measurement signal and divide the sum thereof by 2 to obtain the offset value (V
+
+V
−
)/2, or to measure a “steady-state” value of the measurement signal which is equal to the offset value). The delay may be unacceptable in time-critical applications.
The waveform of “prior art”
FIG. 9
includes an “ideal” offset sinusoidal signal
6
having an amplitude of 1.5 volts, a peak-to-peak value
7
of 2 volts, and a positive offset of 0.5 volts. The 0.5 voltage offset causes the maximum value at point
9
A of the waveform to be +1.5 volts and the minimum value at point
9
B to be −0.5 volts.
Referring to
FIG. 9
, it should be understood that, to convert the offset sinusoidal signal
6
to a digital representation, a differential ADC which ordinarily would be needed to measure the 2 volt peak-to-peak value of the offset input signal
6
would require a 3 volt input range (−1.5 volts to plus 1.5 volts). The full-scale digital output signal produced by the ADC to represent the 2 volt peak-to-peak offset input signal
6
actually would be capable of representing a 3 volt peak-to-peak input signal having zero offset. Thus, the effective resolution of the analog-to-digital conversion of an offset analog input signal is inherently less than the effective resolution of an input signal of the same amplitude but having no offset.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide an ADC capable of automatically compensating a high range of offset component errors in an analog input signal applied to the input of the ADC without requiring use of additional circuit components and without causing substantial delay in computing/determining an accurate digital output that accurately represents the true signal information contained in the analog input signal.
It is another object of the invention to avoid the loss of resolution that ordinarily occurs as a result of analog-to-digital conversion of an input signal having a substantial offset component.
Is another object of the invention to reduce or eliminate the software overhead required for extracting useful information from a measurement signal.
Briefly described, and in accordance with one embodiment thereof, the invention provides an analog-to-digital converter receiving an analog input signal (V
In
) including an offset component. The analog-to-digital converter includes a switched capacitor input circuit (
101
) configured to sample the analog input signal (V
IN+
) to produce and store a signal representative of the sampled input signal on the first conductor (
17
). A conversion circuit (
1
) is coupled to the first conductor (
17
) and the switched capacitor input circuit (
101
), and is configured to produce a digital output signal (DATA OUT) representative of the analog input signal (V
IN
). An offset correction circuit (
4
) includes an output coupled to the a second conductor (
27
), and also includes an input receiving a digital offset correction signal (DATA IN). The offset correction circuit (
4
) includes a switched capacitor correction circuit (
4
A) operative in response to the offset correction control signal (DATA IN) to transfer charge to or from the first conductor (
17
). The portion of the conversion circuit (
1
) connected to the first conductor (
17
) operates in response to adjustment by the offset correction circuit (
4
) of a signal conducted by the second conductor (
27
) so as to produce the digital output signal (DATA OUT) compensated for the offset component.


REFERENCES:
patent: 5523756 (1996-06-01), Mariuz
patent: 6351227 (2002-02-01), Rudberg

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