Offset drift reducing device for use in a differential amplifica

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307491, 307352, 307529, 328127, 328158, 328159, 328160, H03K 524

Patent

active

052763676

ABSTRACT:
In a measuring differential amplifier having first and second input terminals for subtracting a first signal applied to the first input terminal from a second signal applied to the second input terminal to obtain a subtraction and for outputting a signal corresponding to A times of the subtraction, a circuit for reducing an offset generated during measurement. Prior to the measurement, the second signal is applied to the first and second input terminals so that the differential amplifier outputs a voltage corresponding to A times of a difference between the second signals, i.e., A times an offset voltage. At this time, the differential amplifier is connected at its output terminal to one end of a capacitor grounded at the other end so that the voltage corresponding to A times of the offset voltage is applied to the capacitor for charging. During the measurement, the output terminal of the differential amplifier is disconnected from one end of the capacitor so that the voltage charged in the capacitor is applied to the adder and multiplied by 1/A to become again the offset voltage. The adder adds a signal indicative of the offset voltage to the first signal to obtain an addition signal and supplies the addition signal to the first input terminal of the differential amplifier. Thus, the input offset voltage is canceled by an offset voltage newly generated at the differential amplifier.

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patent: 4943736 (1990-07-01), Kihara et al.
patent: 5028815 (1991-07-01), Van de Plassche

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