Amplifiers – Signal feedback – Amplifier in signal feedback path
Reexamination Certificate
2000-05-30
2002-08-27
Mottola, Steven J. (Department: 2817)
Amplifiers
Signal feedback
Amplifier in signal feedback path
C330S134000
Reexamination Certificate
active
06441686
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to variable gain circuits and, more particularly, to an improved circuit and method for reducing offset errors in a variable gain circuit.
BACKGROUND
A charge-couple device (CCD) is the sensor of choice in modern imaging to convert photons into electrons, hence enabling the use of electronics for image processing.
FIG. 1
shows typical analog front-end building blocks for a CCD signal processing channel. The CCD input signal
100
is received by a correlated double sampling circuit (CDS)
102
whose function is to extract the image content from the CCD signal
100
and remove an unwanted correlated noise component. The output of the CDS
102
is amplified by a programmable gain amplifier (PGA)
104
before it gets converted to digital data by an analog-to-digital converter (ADC)
106
. The gain of the PGA can be programmed by providing a gain input to the gain control circuit which controls the gain in the PGA.
In reality, the circuit building blocks have offset, and such offset can reduce the dynamic range of the processing channel. In particular, an offset input to the PGA can get amplified by the PGA by an amount of the gain of the PGA, and hence seriously reduce the useful dynamic range of the PGA output and ADC. Such an offset can come from the CCD signal, the CDS, or can be the input referred offset of the PGA. For example, an offset of 10 mV input into a PGA with a gain of 50×, yields an output referred offset at the output of the PGA of 0.5V. This reduces the dynamic range of the PGA output and ADC by 0.5V, which is not acceptable in most integrated circuit design applications.
In order to address this problem, an offset correction is typically used. One way to provide an offset correction is to integrate the output of the PGA and subtract the accumulated error from the input of the PGA in a feedback fashion. The feedback will adjust the input of the PGA such that the output of the PGA is equal to the system's “zero” reference. This scheme is shown in FIG.
2
. In this figure, INT
200
refers to an integrator.
One problem with the scheme of
FIG. 2
is that the time constant of the loop depends on the gain of the PGA
104
. To keep the feedback loop stable and the noise of the “zero” reference low, it is preferable to keep the bandwidth of the loop low and constant, thereby keeping the loop gain constant with varying PGA gain. This can be accomplished by inserting another PGA in the feedback path with a reciprocal gain characteristic of the PGA in the forward path. This is called a reverse PGA (RPGA)
300
, which is shown in FIG.
3
. The gain characteristics of PGA and RPGA and the loop gain are shown in FIG.
4
. In
FIG. 4
, shown are the gain of the RPGA, the gain of the PGA, and the loop gain, each with respect to the gain input provided to the gain control circuit. In terms of the dynamics of the loop, the order of RPGA
300
and INT
200
in the feedback path does not matter, but it does have circuit level consequences that usually limit the circuit to having INT
200
on the output side of the PGA
104
.
One problem with the modified scheme of
FIG. 3
is that any offset at the input side of the PGA
104
gets gained back to the input of the RPGA
300
or the output of the INT
200
. This offset can consist of the CCD's offset, the CDS' offset, or the input referred offset of the PGA, and can be substantial. Although this offset does not directly affect the dynamic range of the processing channel itself (CDS, PGA, and ADC), it severely limits the operation of the RPGA and INT when the gain of the PGA is high. Again, an offset of 10 mV with a 50× gain in the PGA gets referred back to the input of RPGA as 0.5V. Under a large offset condition, the offset correction scheme of
FIG. 3
fails to operate due to the limited headroom range of the RPGA
300
and INT
200
.
SUMMARY
One embodiment of the invention is directed to a variable gain circuit that includes a first PGA in a feedforward signal path and a second PGA connected in feedback with the first PGA. The variable gain circuit need not be used in an image sensor application (e.g., CCD) as disclosed herein, but may be any variable gain circuit in which it is desired to reduce offset errors of the circuit. An embodiment of the invention includes circuitry for controlling the gain of the first PGA and controlling the gain of the second PGA, independently of one another.
Another embodiment of the invention is directed to a method for correcting offset errors in a variable gain circuit including a first PGA and a second PGA connected in feedback with the first PGA. The method includes the steps of: controlling a gain of the first PGA, controlling a gain of the second PGA independently from the gain control of the first PGA.
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Gregorian and Temes, “Analog MOS Integrated Circuits For Signal Processing,” Wiley-Interscience, 1986, pp. 412-417.
Wierzba et al. “Synthesis of Temperature Variable Capacitors” IEEE 1982 International Symposium on Circuits & Systems May 10-12, 1982, pp. 194-197.
Analog Devices Inc.
Mottola Steven J.
Wolf Greenfield & Sacks P.C.
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