Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
1998-09-23
2001-05-29
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C327S336000
Reexamination Certificate
active
06239643
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an offset correction circuit for correcting an offset error caused by an input signal of a DC amplifier and a DC amplification circuit including the offset correction circuit.
2. Description of the Related Art
In a conventional DC amplifier for amplifying an input signal and outputting the amplified signal, it is ideal that if an input signal is 0, an output signal becomes 0. However, if just after an input signal of a large amplitude is added, it is set to 0, an output signal does not become 0 and an offset error caused by the input signal occurs. Some offset errors caused by the input signal continue for 10 milliseconds to several ten seconds; the cause of continuation of the offset error for a long time may depend on temperature stability and power supply voltage variation rate.
FIG. 5
is a basic circuit diagram of a DC amplifier. First, occurrence of an offset error depending on the temperature stability resulting from an input signal will be discussed. In
FIG. 5
, a DC amplifier
5
is made up of a differential amplifier
55
and a voltage amplifier
56
. The differential amplifier
55
consists of transistors TR
51
and TR
52
and resistors R
51
, R
52
, and R
53
. The voltage amplifier
56
consists of a transistor TR
53
and resistors R
54
and R
55
. A positive input terminal IN
51
is connected to a base of the transistor TR
51
and a negative input terminal IN
52
is connected to a base of the transistor TR
52
. An output terminal O
51
is connected to the resistor R
55
. A positive power supply is connected to a power supply input terminal V
51
and a negative power supply is connected to a power supply input terminal V
52
.
A signal is input through the positive input terminal IN
51
or the negative input terminal IN
52
and is output to the output terminal O
51
. Normally, a part of signal output from the output terminal O
51
is fed back into the negative input terminal IN
52
, but not fed back in
FIG. 5
for simplicity. The transistors TR
51
and TR
52
are of the same structure and characteristics and the resistors R
51
and R
52
are of the same resistance value. Further, if the applied voltage to the positive input terminal IN
51
is set to 0 and the negative input terminal IN
52
is grounded, the current flowing into the resistors R
51
and R
52
is reduced to half the current flowing into the resistor R
53
, and the characteristics of the transistor TR
53
and the resistor R
55
are adjusted so that the voltage of the output terminal O
51
becomes 0.
First, when a positive voltage is applied to the positive input terminal IN
51
, in the differential amplifier
55
, a collector current of the transistor TR
51
increases and a collector current of the transistor TR
52
decreases. As the collector current of the transistor TR
51
increases, the voltage of the resistor R
51
increases and the collector-emitter voltage of the transistor TR
51
decreases. Normally, to widen the differential input range, the collector-emitter voltage of the transistor TR
51
or TR
52
is large as compared with the voltage of the resistor R
51
or R
52
. Thus, the decrease rate of the collector-emitter voltage of the transistor TR
51
is small as compared with the increase rate of the current of the transistor TR
51
. Therefore, power consumption of the transistor TR
51
is increased and the device temperature of the transistor TR
51
rises. Since power consumption of the transistor TR
52
is decreased and the device temperature of the transistor TR
52
lowers, the temperature of the transistor TR
51
becomes higher than that of the transistor TR
52
. The temperature difference between the transistors TR
51
and TR
52
is as in the following expression (1):
1
Q
(
51
)
∫
(
P
(
51
)
-
Δ
T
(
51
)
θ
(
51
)
)
ⅆ
t
-
1
Q
(
52
)
∫
(
P
(
52
)
-
Δ
T
(
52
)
θ
(
52
)
)
ⅆ
t
where
Q(
51
), Q(
52
): Heat capacity of transistor TR
51
, TR
52
,
P(
51
), P(
52
): Heating value of transistor TR
51
, TR
52
,
&Dgr;T(
51
), &Dgr;T(
52
): Temperature difference between device of transistor TR
51
, TR
52
and environment, and
&thgr;(
51
), &thgr;(
52
): Heat resistance between device of transistor TR
51
, TR
52
and environment.
Next, the applied voltage to the positive input terminal IN
51
is set to 0. If there is no temperature difference between the transistors TR
51
and TR
52
, the currents flowing into the resistors R
51
and R
52
become the same and the voltage of the output terminal O
51
becomes 0. However, since the temperature of the transistor TR
51
is higher than that of the transistor TR
52
as described above, the base-emitter voltage of the transistor TR
51
becomes smaller than the base-emitter voltage of the transistor TR
52
. Thus, the base current of the transistor TR
51
becomes larger than the base current of the transistor TR
52
and the collector current of the transistor TR
51
becomes larger than the collector current of the transistor TR
52
. As the collector current of the transistor TR
51
becomes larger than the collector current of the transistor TR
52
, the voltage of the resistor R
51
becomes larger than the voltage of the resistor R
52
and a positive offset error voltage occurs at the output terminal O
51
.
The offset error voltage occurring at the output terminal O
51
is caused by the temperature difference between the transistors TR
51
and TR
52
; the cause of temperature difference occurrence between the transistors TR
51
and TR
52
is eliminated already by setting the applied voltage of the positive input terminal IN
51
to 0, but the temperature difference caused by the power consumption difference between the transistors TR
51
and TR
52
when a potential difference occurs between the positive input terminal IN
51
and the negative input terminal IN
52
is accumulated because of the heat capacities of the transistors TR
51
and TR
52
. The accumulated temperature difference gradually lessens according to the condition under which P(
51
) and P(
52
) in Expression (1) become the same. As the temperature difference lessens, the offset error voltage occurring at the output terminal O
51
also lessens. When the temperature difference between the transistors TR
51
and TR
52
is eliminated, the offset error occurring at the output terminal O
51
is also eliminated.
As described above, in the conventional DC amplifier
5
, the temperature stability is degraded because of temperature variation of the components of the DC amplifier
5
caused by the input signal and an offset error occurs.
Next, occurrence of an offset error because of power supply voltage variation caused by an input signal in the DC amplifier
5
will be discussed. First, power supply voltage variation caused by an input signal will be discussed. In
FIG. 5
, if the voltage of the output terminal O
51
of the DC amplifier
5
is positive, the collector current of the transistor TR
53
grows as compared with the case where the voltage of the output terminal O
51
is 0. Thus, the power supply current of the positive power supply input terminal V
51
and the negative power supply input terminal V
52
grows; the current flowing out through the output terminal O
51
flows out from the positive power supply input terminal V
51
via the transistor TR
53
to the output terminal O
51
and the current flowing in through the output terminal O
51
flows into the negative power supply input terminal V
52
via the resistor R
55
from the output terminal O
51
. Therefore, output of the DC amplifier
5
changes with the input voltage, thus the power supply current varies with the input voltage and if the power supply current varies, variation of the power supply voltage commensurate with output resistance of the power supply connected to the DC amplifier
5
occurs. The power supply voltage variation caused by the input signal thus occurs.
Next, occurrence of an offset error because of pow
Ando Electric Co. Ltd.
Callahan Timothy P.
Englund Terry L.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
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