Offset correction circuit

Details Offset correction circuit Offset correction circuit

1993-10-28

1995-06-06

Safourek, Benedict V.

Multiplex communications

Wide area network

Packet switching

455324, H04B 130, H04B 7212

Patent

active

054228891

ABSTRACT:
The direct conversion receiver DCR receives analog modulating signals with a reference average value and modulated within assigned time slots of a TDMA-structure on a carrier with a carrier frequency FC which changes from time slot to time slot. DCR includes a demodulator circuit DC-coupled to a baseband circuit, the demodulator circuit including a local oscillator LO and a mixer MIX and the baseband circuit including an offset correction circuit OCC/OCC' for updating different variable parameter offset correction values for different FC stored in a memory MEM and compensating offset introduced in DCR. OCC/OCC' determines, upon occurrence of an assigned time slot, an updated offset correction value as a function of an old offset correction value in a corresponding storage location of MEM and the difference between an average value of the analog signal and the reference average value, and thereupon stores the result in the corresponding storage place.

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