Offset corrected amplifier

Amplifiers – With periodic switching input-output

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330 30D, 330 35, 330 51, 330 85, H03F 126

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039886891

ABSTRACT:
A circuit for cancelling the offset voltage of a signal amplifier includes a second amplifier and a third amplifier connected to the outputs of the signal amplifier and the second amplifier. A capacitor is connected between the inputs of the second amplifier for storing the offset voltages of the amplifiers thereon. A switch connects the output of the third amplifier to the capacitor and a switch connects the inputs of the signal amplifier together during offset correction. When the offset voltages are stored on the capacitor, the switches open to permit signal amplification and cancellation of the offset voltages. In a second embodiment, a second capacitor stores the instantaneous amplitude of the signal being amplified and supplies it to an input of the second amplifier such that a discontinuity will not appear in the circuit output during offset correction.

REFERENCES:
patent: 2946013 (1960-07-01), Deighton
patent: 3667055 (1972-05-01), Uchida
hellwarth et al., "Automatic Zero-Correction Amplifier," IBM Technical Disclosure Bulletin, vol. 15, No. 1, pp. 140, 141, June 1972.
Hellwarth et al., "Differential Automatic Zero-Correction Amplifier," IBM Technical Disclosure Bulletin, vol. 15, No. 9, Feb. 1973, pp. 2719-2720.
Jaeger et al., "Dynamic Zero-Correction Method Suppresses Offset Error in Op Amps," Electronics, Dec. 4, 1972, pp. 109, 110.

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