Amplifiers – With periodic switching input-output
Reexamination Certificate
2001-02-15
2002-05-21
Pascal, Robert (Department: 2817)
Amplifiers
With periodic switching input-output
C330S069000, C327S124000
Reexamination Certificate
active
06392475
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integration circuit, and in particular, to a differential amplifier circuit.
2. Background of the Related Art
A differential amplifier includes a non-inversion input terminal, an inversion terminal and an output terminal generating an output voltage in accordance with a differential input voltage. The differential amplifiers are used in applied fields for various purposes, one of which is a buffer. One differential amplifier used as a buffer is termed a ‘voltage follower’. In this buffer, an input signal is inputted to a non-inversion input terminal of the differential amplifier, and an output signal is fed back to an inversion input terminal of the differential amplifier.
FIG. 1
is a diagram that shows a related art differential amplifier circuit, which is an offset cancellation circuit of an amplifier disclosed by U.S. Pat. No. 6,049,246 (AMPLIFIER OFFSET CANCELLATION USING CURRENT COPIER). As shown in
FIG. 1
, the related art offset cancellation circuit detects an offset current using a current copier circuit connected to an output terminal. Then, an offset voltage is cancelled by compensating the offset voltage from an output voltage generated from a differential input voltage.
The offset cancellation circuit shown in
FIG. 1
includes a current copier circuit in an output stage of a differential amplifier to detect and compensate an offset. The related art current copier circuit carries out an offset voltage detection once and stores the result. Then, the current copier circuit executes an offset compensation by applying the detected offset voltage to all output signals.
In
FIG. 1
, an operational transconductance amplifier (OTA)
20
is shown having input terminals
22
and
24
and output terminal
26
coupled to output node
46
. A feedback path extends between output node
46
and negative input terminal
24
. A first switch
56
extends between positive input terminal
22
and negative input terminal
24
for selectively shorting such input terminals together in order to null any input differential voltage thereacross. A second switch
58
is inserted within the aforementioned feedback path for selectively opening or closing the feedback path that couples output node
46
back to negative input terminal
24
of the OTA
20
. When switch
58
is closed, as shown in
FIG. 1
, the OTA
20
operates in closed-loop fashion; when switch
58
is opened the OTA
20
operates in open-loop fashion.
As shown in
FIG. 1
, a current copier circuit is conceptually represented by current source
60
, transistor
62
, and storage capacitor
64
. The current copier circuit has a first terminal
66
for selectively allowing storage capacitor
64
to be connected to the output node
46
of the OTA
20
. The current copier circuit also includes a second terminal
68
coupled to the output node
46
, and to the output terminal
26
of the OTA
20
. The function of this current copier circuit is to “supply” an offset current having a magnitude that is equal and opposite to the output offset current of OTA
20
. As used herein, the term “supply” could mean either sourcing current or sinking current. As shown in
FIG. 1
, a third switch
70
is provided for selectively coupling the first terminal
66
of the current copier circuit to the output node
46
of the OTA
20
, thereby allowing the current copier circuit to respond to the voltage present on the output node
46
. The current source
60
sources a fixed amount of current. The transistor
62
can be biased to sink an amount of current that is either greater than, equal to, or less than, the amount of current source by the current source
60
.
As described above, the related art differential amplifier offset cancellation circuit has various disadvantages. As the magnitude of input signal of a differential amplifier varies so does that of the offset voltage included in the output voltage. Thus, the related art differential amplifier offset cancellation circuit is unable to accomplish a precise offset compensation because the identical offset voltage is applied to all of the output signals for offset compensation. Further, the offset cancellation circuit according to the related art uses a current source for detection and compensation of an offset voltage, which consumes current unnecessary for offset detection and compensation modes.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
SUMMARY OF THE INVENTION
An object of the invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages described hereinafter.
Another object of the present invention is to provide an offset compensation apparatus in a differential amplifier circuit and an offset compensation method thereof that substantially obviates one or more of the problems caused by limitations and disadvantages of the related art.
Another object of the present invention is to provide an offset compensation apparatus in a differential amplifier circuit and an offset compensation method thereof that compensates an offset in a differential amplifier circuit by coupling a non-inversion input terminal of a differential amplifier circuit to a storage device.
Another object of the present invention is to provide an offset compensation apparatus in a differential amplifier circuit and an offset compensation method thereof that compensates an offset in a differential amplifier circuit by coupling a non-inversion input terminal of a differential amplifier circuit to a storage device to store an offset voltage for each input signal.
Another object of the present invention is to provide an offset compensation apparatus in a differential amplifier circuit and an offset compensation method thereof that compensates an offset in a differential amplifier circuit by coupling a non-inversion input terminal of a differential amplifier circuit to a capacitor that stores an offset voltage, which is determined by detecting an offset of the differential amplifier circuit, storing the offset in the capacitor and by inputting the result of compensating the offset voltage for an input voltage into the differential amplifier.
To achieve at least the object and other advantages in a whole or in part and in accordance with the purpose of the present invention, as embodied and broadly described, the present invention of an offset compensation apparatus in a differential amplifier circuit that drives a load includes an input stage that receives an input voltage, a differential amplifier that includes a non-inversion input terminal, an inversion input terminal and an output stage, wherein the non-inversion and inversion input terminals receive a differential input voltage and the output stage generates an output voltage in accordance with the differential input voltage, a capacitor coupled to the non-inversion input terminal, a first switch coupled between the input stage and the capacitor, wherein the first switch is controlled by a first control signal and selectively couples the input stage to the capacitor, a second switch coupled between the input stage and the non-inversion input terminal, wherein the second switch is controlled by a second control signal and selectively couples the input stage to the non-inversion input terminal, and a third switch coupled between the output stage and the capacitor, wherein the third switch is controlled by the second control signal and selectively couples the output stage to the capacitor.
To further achieve the above objects in a whole or in part, an offset compensation method in a differential amplifier circuit is provided, wherein the amplifier circuit includes an input stage that receives an input voltage, a differential amplifier having a non-inversion input terminal, an inversion input terminal and a first output stage, wherein the non-inversion and inversion input terminals receive a differ
Choe Henry
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
Pascal Robert
LandOfFree
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