Offset compensating circuit

Details Offset compensating circuit Offset compensating circuit

1980-12-19

1983-03-22

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 307494, 307520, 328128, 328162, 330 9, H03K 508, H03F 134

Patent

active

043777597

DESCRIPTION:

BRIEF SUMMARY
DESCRIPTION



BACKGROUND OF THE INVENTION

The present invention relates to an offset compensating circuit and, more particularly, relates to an offset compensating circuit which may suitably be applied to, for example, a coding and decoding circuit employed in a PCM (pulse-code modulation) communication system.
Generally, in a circuit which includes an operational amplifier, a DC voltage error is often generated by the circuit due to various factors, for example, a mismatching between two transistors comprising a differential amplifier, or a temperature variation. The DC voltage error is usually called an "offset". The offset must be compensated for in such a circuit, in order to suppress the transmission of the offset therefrom. When an operational amplifier having an offset is included in a coding and decoding circuit, for example, the voice reproduced from the circuit changes for the worse in speech quality, and the noise produced from the circuit during intervals between speech may become high. Therefore, the offset must be suppressed for the purpose of improving the speech quality and decreasing the noise.
When such a coding and decoding circuit is comprised of discrete electrical components, it is relatively easy to suppress the offset. This is because the respective electric characteristics of the discrete electric components can easily be adjusted manually from the outside of the coding and decoding circuit, in order to suppress the offset. However, the latest tendency is to make the coding and decoding circuit in the form of an LSI (large-scale integration) circuit, because the coding and decoding circuits which are fabricated as LSI circuits have stable performances and can be manufactured at a relatively low price by mass produced. It should be understood that a coding and decoding circuit fabricated as an LSI circuit cannot be adjusted manually from the outside of the LSI and, accordingly, it is impossible to suppress the offset thereof by directly applying external means for suppressing the offset on the bare LSI chip itself. Such external means can, perhaps, be indirectly applied on the LSI chip via input, output pins extending therefrom. For example, such external means can include an adjusting capacitor or an adjusting resistor, which are connected to corresponding input/output pins. However, in the mass produced process, it is not desirable to connect such external means to the corresponding input/output pins of each of the LSI chips one by one, because the mass produced LSI chips having such external means do not exhibit stable performance and cannot be fabricated at a low price. Thus, it is desirable to suppress the offset without attaching any such external means to the LSI circuits.


SUMMARY OF THE INVENTION

An object of the present invention, therefore, is to provide an offset compensating circuit to be accommodated inside a circuit to be compensated as one body, without attaching thereto any external means for suppressing the offset.
According to the present invention, in a circuit which is to be compensated and which receives an input voltage and produces an output voltage through a predetermined operation, a corrective voltage is combined with the input voltage of said circuit through a feedback loop, the corrective voltage varying stepwisely toward a negative voltage or a positive voltage in accordance with the variation of the output voltage toward a positive voltage or negative voltage, respectively, along a very gentle stepwise slope. In this case, it is preferable to produce said corrective voltage by means of a so-called switched capacitor filter.
It should be noted that the present invention relies on the fact that the output voltage produced from a circuit to be compensated, such as the above mentioned coding and decoding circuit, varies depending upon conditions; that is, the probablity of the occurrences of a positive output voltage is almost the same as the probability of the occurrences of a negative output voltage during the generation of the output voltage signal

REFERENCES:
patent: 3764922 (1973-10-01), Gilbert et al.
patent: 3772604 (1973-11-01), Hogg et al.

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