Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – By integrating
Utility Patent
1999-06-29
2001-01-02
Le, Dinh T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific input to output function
By integrating
C327S336000, C327S554000, C327S558000
Utility Patent
active
06169440
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to an integrator and filter constituted of one or more offset-compensated switched-capacitor circuits. More specifically, it relates to an integrator and filter capable of working under a low operation voltage.
2. Description of Related Art
To achieve faster operation, integrated circuits require an increase in integration, thereby increasing power consumption. Hence, a low operation voltage is desired for various integrated circuits and systems processing analog or digital signals. Many technicians try to improve fabrication arts, circuit and logic design, structure, or algorithms to meet the requirements of low operation voltage to drive communication, electronic, and computer products. One of the most direct improvements is to modify the circuit design to operate the integrated circuit under a low supply voltage and then reduce the power consumption. In the such circuit design, many MOS transistors within integrators and filters are used to implement the integrated circuit. But the threshold voltage of MOS transistors (about 0.7 to 1 voltage) actually limits their practical utility.
Conventional switched-capacitor circuits are mainly applied to implement the analog and digital signal process circuits, including analog-to-digital converters, digital-to-analog converters, and sampling-hold circuits. However, the offset voltages of amplifiers in the integrators and filters effect the operation precision. Solutions for the above problem include (1)MOS switches with low threshold voltages disclosed in “A 1.4V switched capacitor filter”, in IEEE Proceeding of CICC, pp. 8.2.1-8.3.4, May 1900, by K. Takasuka, etc., (2)a method to raise the clock boosting disclosed in “1.2V CMOS switched-capacitor circuits”, in IEEE Int. Solid-State Circuit Conference, pp. 388-389, February 1996, by J. T. Wu., etc., and (3)a switched-opamp technique disclosed in “Switched-opamp: an approach to realize full CMOS switched-capacitor circuit at very low power supply voltage”, IEEE J. Solid-State Circuit, SC-29, pp. 936-942, August 1994 by J. Crols, etc. A specific fabricating process is necessary to realize method (1), so the cost is higher than common methods. While the mentioned specific fabricating process is not needed in method (2), the trend of semiconductor devices is to low operation voltage. And while it is not necessary to execute the specific fabricating process or raise the clock boosting in method (3), the offset voltage problem from MOS transistors still exists.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an offset-compensated switched-capacitor integrator and filter, which can be operated under a low supply voltage and compensate the offset voltage of the opamp with switched-capacitor circuits, thereby improving the operation precision.
The present invention provides one integrator having offset-compensated switched-capacitor circuits, which can be operated under a low power voltage, comprising a first amplifier having a non-inverting input terminal coupled to a ground, an inverting input terminal, and an output terminal; a first capacitor, which has a terminal receiving said input signal and another terminal coupled to said inverting input terminal of said first amplifier; a first switch coupled between said first capacitor and said ground; a second switch and a third switch coupled to said inverting input terminal of said first amplifier, wherein said third switch is also coupled to said output terminal of said first amplifier; a second capacitor, which has a terminal coupled to said second switch and another terminal coupled to said output terminal of said first amplifier; a third capacitor coupled to said output terminal of said first amplifier; a second amplifier comprising a non-inverting input terminal coupled to said ground, an inverting input terminal coupled to said three capacitors, and an output terminal; and a fourth capacitor and a fourth switch coupled in parallel between said inverting input terminal and said output terminal of said second amplifier; wherein a first timing waveform operates said first switch and second switch and a second timing waveform operates said third switch and fourth switch, said first and second timing waveforms having a same period and showing different logic levels at the same time.
The present invention provides another integrator having offset-compensated switched-capacitor circuits, which is able to be operated under a low power voltage, comprising a first amplifier having a non-inverting input terminal coupled to a ground, an inverting input terminal, and an output terminal; a fifth capacitor coupled to said inverting input terminal of said first amplifier; a first capacitor, which has a first terminal coupled to said fifth capacitor and a second terminal receiving an input signal; a first switch coupled between said second terminal of said first capacitor and said ground; a second switch coupled between said ground and a terminal coupling said first capacitor and said fifth capacitor; a third switch coupled to said terminal coupling and said first capacitor said fifth capacitor; a second capacitor coupled between said third switch and said output terminal of said first amplifier; a fourth switch coupled between said inverting input terminal and said output terminal of said first amplifier; a third capacitor coupled to said output terminal of said first amplifier; a second amplifier comprising a non-inverting input terminal coupled to said ground, an inverting input terminal coupled to said three capacitors, and an output terminal; and a fourth capacitor and a fifth switch coupled in parallel between said inverting input terminal and said output terminal of said second amplifier; wherein a first timing waveform operates said first, second and fourth switches and a second timing waveform operates said third switch and fifth switch, said first and second timing waveforms having a same period and showing different logic levels at the same time.
The present invention provides one filter having offset-compensated switched-capacitor circuits, which can be operated under a low supply voltage, comprising a first amplifier having a non-inverting input terminal coupled to a ground, an inverting input terminal, and an output terminal; a first capacitor coupled to said inverting input terminal of said first amplifier; a first switch coupled between said first capacitor and a signal input terminal; a second switch coupled between said ground and a terminal coupling said first capacitor and said first switch; a second capacitor coupled to said output terminal of said first amplifier; a third switch coupled between said inverting input terminal of said first amplifier and said second capacitor; a fourth switch coupled between said output terminal and said inverting input terminal of said first amplifier; a third capacitor coupled to said output terminal of said first amplifier; a second amplifier having a non-inverting input terminal coupled to a ground, an inverting input terminal coupled to said third capacitor, and an output terminal; a fourth capacitor and a fifth switch coupled in parallel between said inverting input terminal and said output terminal of said second amplifier; a fifth capacitor coupled to said output terminal of said second amplifier; a seventh switch coupled to said fifth capacitor; a sixth switch coupled between said inverting terminal of said second amplifier and a terminal coupling said fifth capacitor and said seventh switch; a ninth capacitor coupled to said seventh switch; an eighth switch coupled between said ground and a terminal coupling said seventh switch and said ninth capacitor; a third amplifier having a non-inverting input terminal coupled to a ground, an inverting input terminal coupled to said ninth capacitor, and an output terminal; a ninth switch coupled between said inverting input terminal and said output terminal of said third amplifier; a tenth switch and an eleventh switch c
Fish & Richardson P.C.
Le Dinh T.
National Science Council
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