Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
1999-04-26
2002-08-27
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S053000, C327S083000, C365S189070
Reexamination Certificate
active
06441650
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a comparator or its forming method, and more particularly to an offset comparator and its forming method.
BACKGROUND OF THE INVENTION
As well known in the art, the resistor is generally used to create an offset or a threshold or trip voltage in a comparator.
FIG. 1
shows a comparator with a threshold offset caused by using a resistor. The offset comparator includes a differential stage
30
having a first input V
01
and a second input V
02
, an output stage
40
electrically connected to differential stage
30
such that the output V
0
is zero when two inputs V
01
and V
02
have therebetween a specific voltage difference. A biasing stage
50
having two source followers SF
1
and SF
2
being equally biased by Vb
1
to be respectively electrically connected to inputs V
02
and V
01
of differential stage
30
. A resistor
14
is electrically connected in source follower SF
2
for providing an offset in the comparator. Transistors
12
and
13
constitute the first source follower SF
1
where the voltage at input V
02
is a threshold below the comparator input Vin
2
. Transistors
11
and
10
and resistor
14
constitute a second source follower SF
2
in which the voltage at the point Vr
1
is a threshold below the comparator input Vin
1
and the voltage at differential input V
01
is an IR drop below the voltage at point Vr
1
. The offset in the comparator transfer function is created due to resistor
14
which creates an offset between differential inputs V
01
and V
02
.
For a threshold offset comparator, output V
0
is non-zero when both inputs V
01
and V
02
are equal. Hence, an offset needs to be created between two inputs V
01
and V
02
of differential stage
30
when the two inputs Vin
1
and Vin
2
to source followers SF
1
and SF
2
are equal, in order to create an offset in the transfer function of differential stage
30
.
As mentioned above, the resistor is commonly used to generate an offset or a trip voltage in the comparator. When both comparator inputs Vin
1
and Vin
2
are equal, the outputs V
01
and V
02
of source followers SF
2
and SF
1
are deliberately made unequal. When one of comparator inputs Vin
1
and Vin
2
exceeds the other input by a certain value, source follower outputs or differential stage inputs V
01
and V
02
are equal. That value is called the trip voltage of the comparator and the output V
0
of the comparator is zero in this value. The above-mentioned mode of operation creates an offset in the comparator output.
Resistor
14
is the key to creating an offset in the comparator transfer function. The variation of the resistor across different process corners and temperatures, however, will cause the comparator threshold voltage to vary. In the past, compensated resistors are proposed to overcome this situation. The resistor compensation, however, will require some complex circuit design. This will lead to an increased silicon area and more power consumption. Moreover, resistors have parasitic capacitances associated therewith which will lead to a reduced bandwidth.
It is therefore tried by the Applicant to deal with the above situations encountered in the prior art.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of forming a comparator for alleviating problems associated with a comparator using a resistor.
It is further an object of the present invention to provide a resistorless threshold offset comparator.
In addition, an object of the present invention to provide an offset comparator having a resistorless bias compensation.
It is still an object of the present invention to provide an offset comparator having a threshold voltage independent of different process corners and/or temperatures.
It is yet an object of the present invention to provide an offset comparator having a reduced silicon area.
It is one more object of the present invention to provide an offset comparator being better in terms of portability and/or area efficiency.
It is again an object of the present invention to provide an offset comparator suitable for use in an increased bandwidth.
It is once more an object of the present invention to provide an offset comparator in which the process compensation is automatically implemented as a part of the bias circuit.
It is nevertheless an object of the present invention to provide an offset comparator having a simple compensation technique.
It is furthermore an object of the present invention to provide a compensated offset comparator having a less power consumption.
According to an aspect of the present invention, an offset comparator includes a differential stage having a first input and a second input, an output stage electrically connected to the differential stage such that the output is zero when the two inputs have therebetween a specific voltage difference, and a biasing stage electrically connected to the differential stage, providing a first biasing voltage for creating a second input voltage in the second input and providing a second biasing voltage for creating a first input voltage in the first input such that the two input voltages have therebetween the specific voltage difference.
The biasing stage generally includes a first voltage provider for providing the second input voltage, and a second voltage provider for providing the first input voltage.
Certainly, the first and second voltage providers can respectively be a first source follower and a second source follower. The second biasing voltage can be lower than the first biasing voltage, or alternatively, the first biasing voltage lower than the second voltage.
Preferably, the comparator further includes a first diode connected transistor electrically connected to the first source follower for providing thereto a first biasing current, and a second diode connected transistor electrically connected to the second source follower for providing thereto a second biasing current.
Certainly, the first biasing current can be lower than the second biasing current, or alternatively higher than the second biasing current.
The present comparator can further include a diode connected transistor electrically connected to the second voltage provider for providing thereto a relatively constant biasing current. Alternatively, the present comparator preferably includes a bias-compensating circuit electrically connected to the second voltage provider so that the comparator can produce a fixed trip voltage.
Certainly, the bias-compensating circuit can include a fixed biasing current circuit for providing a fixed biasing current, and a variable current circuit electrically connected to the fixed biasing current circuit for providing a manufacturing parameter-dependent current.
Preferably, the fixed biasing current is a diode connected transistor obtaining the fixed biasing current from a bias circuit. The variable current circuit includes a complementary pair of transistors provided with a fixed bandgap voltage.
Preferably, the present comparator further includes a current mirror electrically connected to the variable current circuit for providing the second voltage provider with a current being a summation of the fixed biasing current and the variable current.
Preferably, the present comparator further includes a diode connected transistor electrically connected between the current mirror and the second voltage provider.
In accordance with a second aspect of the present invention, an offset comparator includes a differential stage having a first input and a second input, an output stage electrically connected to the differential stage such that the output is zero when the two inputs have therebetween a specific voltage difference, and a resistorless biasing stage electrically connected to the differential stage, providing a first input voltage for the first input and providing a second input voltage for the second input such that the two input voltages have therebetween the specific voltage difference.
Certainly, the biasing stage can include a first voltage provider
ADMtek Incorporated
Alston & Bird LLP
Callahan Timothy P.
Nguyen Minh
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