Amplifiers – With periodic switching input-output
Reexamination Certificate
2006-08-08
2006-08-08
Mottola, Steven J. (Department: 2817)
Amplifiers
With periodic switching input-output
C330S011000
Reexamination Certificate
active
07088174
ABSTRACT:
A method and apparatus to provide slice adjustment and offset cancellation in a high frequency limiting amplifier is described.
REFERENCES:
patent: 3919482 (1975-11-01), Hamada
patent: 4634995 (1987-01-01), Nakagawa et al.
patent: 4772859 (1988-09-01), Sakai
patent: 5802464 (1998-09-01), Ashida
patent: 5986502 (1999-11-01), Nakamura
patent: 6657488 (2003-12-01), King et al.
Y. Greshishchev et al., “A 60-dB Gain, 55-dB Dynamic Range, 10-GB/s Broad-Band SiGe HBT Limiting Amplifier”, IEEE, 1999, pp. 1914-1920, vol. 34, Issue 12.
M. Moller et al., “15Gbit/s High-Gain Limiting Amplifier Fabricated Using Si-Bipolar Production Technology”, Electronics Letters, Sep. 1, 1994, pp. 1519-1521, vol. 30, No. 18.
J. Akagi et al., “AIGaAs/GaAs HBT Receiver ICs for a 10 Gbps Optical Communication System”, IEEE, GaAs IC Symposium, 1990, pp. 45-48.
M. Nakamura et al., “A 15-GHz AIGaAs/GaAs HBT Limiting Amplifier with Low Phase Deviation”, GaAs IC Symposium, IEEE, 1991, pp. 45-48.
I. Anderson et al., “Silicon Bipolar Chipset for SONET/SDH 10 Gbit/s Fiber-Optic Links”, IEEE 1994 Custom Integrated Circuits Conference, May 1-4, 1994, pp. 617-620.
K. Runge et al., “High Speed AIGaAs/GaAs HBT Circuits For Up To 40 Gb/s Optical Communication”, GaAs IC Symposium, IEEE, 1997, pp. 211-214.
T. Masuda et al., “45GHz Transimpedance 32dB Limiting Amplifier and 40Gb/s 1:4 High-Sensitivity Demultiplexer with Decision Circuit Using SiGe HBTs for 40Gb/s Optical Receiver”, ISSCC 2000, Session 3, Gigabit-Rate Communications, Paper MP 3.6, IEEE, 2000, pp. 60-61 snd 447.
Y. Baeyens et al., “InP D-HBT IC'S For 40 Gb/s and Higher Bitrate Lightwaave Tranceivers”, GaAs IC Symposium, 2001 IEEE GaAs Digest, 2001, pp. 125-128.
G. Georgiou et al., “Clock and Data Recovery IC for 40-Gb/s Fiber-Optic Receiver”, IEEE, Sep. 2002, pp. 1120-1125, vol. 37, No. 9.
Y. Baeyens et al., “InP D-HBT ICs for 40-Gb/s and Higher Bitrate Lightwave Transceivers”, IEEE, Sep. 2002, pp. 1152-1159, vol. 37, No. 9.
G. Freeman et al., “40-Gb/s Circuits Built From A 120-GHz f/sub T/SiGe Technology”, IEEE, Sep. 2002, pp. 1106-1114, vol. 37, No. 9.
K. Runge et al., “Silicon Bipolar Integrated Circuits for Multi-Gb/s Optical Communication Systems”, IEEE, Jun. 1991, pp. 636-644, vol. 9, No. 5.
M. Nakamura et al., “A Limiting Amplifier with Low Phase Deviation Using an AIGaAs/GaAs HBT”, IEEE, Oct. 1992, pp. 1421-1427, vol. 27, No. 10.
L. Ingmar Anderson et al., “Silicon Bipolar Chipset for SONET/SDH 10 Gb/s Fiber-Optic Communication Links”, IEEE, Mar. 1995, pp. 210-218, vol. 30, No. 3.
M. Yung et al., “Highly Integrated InP HBT Optical Receivers”, IEEE, Feb. 1999, pp. 219-217, vol. 34, No. 2.
Z. Wang et al., “17GHz-Bandwith 17dB-Gain 0.3um-HEMT Low-Power Limiting Amplifier”, Symposium on VLSI Circuits Digest of Technical Papers, 1995, pp. 97-98.
S. Khorram et al., “A CMOS Limiting Amplifier and Signal-Strength Indicator”, Symposium on VLSI Circuits Digest of Technical Papers, 1995, pp. 95-96.
B. Kwark et al., “AIGaAs/GaAs HBT Limiting Amplifier for 10Gbps Optical Transmission System”, IEEE Radio Frequency Integrated Circuits Symposium, 1997, pp. 55-58.
F. Centurrelli et al., “Input-Matching and Offset-Compensation Network for Limiting Amplifiers in Optical Communication Systems”, SSMSD '99, IEEE, 1999, pp. 113-116.
G. Georgiou et al., “High Gain Limiting Amplifier for 10Gbps Lightwave Receivers”, 11th International Conference on Indium Phosphide and Related Materials, IEEE, 1999, pp. 71-74.
T. Morikawa et al., “A SiGe Single-Chip 3.3 V Receiver IC for 10 Gb/s Optical Communication Systems”, ISSCC99, Session 22, Paper WP 22.3, IEEE, 1999, pp. 380-38811.
M. Nakamura et al., “An Instantaneous Response CMOS Optical Receiver IC with Wide Dynamic Range and Extremely High Sensitivity Using Feed-Forward Auto-Bias Adjustment”, IEEE, Sep. 1995, pp. 991-997, vol. 30, No. 9.
A.I. Drukarev, “Noise Performance and SNR Threshold in PFM”, IEEE, Jul. 1985, pp. 708-711, vol. 33, No. 7.
C. Eldering, “Theoretical Determination of Sensitivity Penalty for Burst Mode Fiber Optic Receivers”, Journal of Lightwave Technology, IEEE, Dec. 1993, pp. 2145-2149, vol. 11, No. 12.
G. Smith et al., “Accelerated Measurement of Low BERs in Fiber Optic Communication System”, OFC/IOOC '99, Technical Digest, 1999, pp. 334, vol. 2.
J. Winters et al., “Adaptive Nonlinear Cancellation for High-Speed Fiber-Optic Systems ”, Journal of Lightwave Tech., IEEE, Jul. 1992, pp. 971-977, vol. 10, No. 7.
V. Arya et al., “Application of Optical Preamplification to Optimize Receiver Sensitivity in Spectrum-Sliced WDM Communication Systems”, Lasers and Electro-Optics SocietyAnnual Meeting, LEOS '96, 1996, pp. 250-251, vol. 2.
Intel Corporation
Kacvinsky LLC
Mottola Steven J.
LandOfFree
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