Offset cancel circuit of voltage follower equipped with...

Amplifiers – With periodic switching input-output

Reexamination Certificate

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C330S253000, C327S307000

Reexamination Certificate

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06946905

ABSTRACT:
A differential amplifying circuit11includes a current mirror circuit having first and second current ends to which drains of MOS transistors M8and M9are respectively connected, and a pair of differential MOS transistors M1and M2having gates between which a switch SW1is connected. A reference potential Vref is applied to the gate of the MOS transistors M9. A switch SW2is connected between the output VO of an output buffer circuit12and the gate of a MOS transistor M1, and a switch SW3is connected between the output VO and the gate of the MOS transistor M8. During the offset-cancel preparation period, the switches SW1and SW3are on and the switch SW2is off. Next, the switches SW1to SW3are turned over, consequently outputting offset-canceled potential VO.

REFERENCES:
patent: 6448836 (2002-09-01), Kokubun et al.
patent: 6586990 (2003-07-01), Udo et al.
patent: 6756842 (2004-06-01), Mehr et al.
patent: 2001-292041 (2001-10-01), None

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