Odd-transform fast convolution

Details Odd-transform fast convolution Odd-transform fast convolution

1998-10-16

2001-11-27

Malzahn, David H. (Department: 2121)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S315000

Reexamination Certificate

active

06324559

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the problem of filtering, decimation or interpolation and frequency conversion in the digital domain, and more particularly to the use of a modified fast convolution algorithm in wideband multichannel receiver, channelization, and transmitter, de-channelization, structures of a radio communication system.
RELATED ART
In radio base station applications for cellular, Land Mobile Radio (LMR), satellite, wireless local area networks (WLAN's) and other communication systems, many receiving and transmitting channels are handled simultaneously. In the future this will also become the situation for the terminals, i.e. mobile telephones. There exist channelization and de-channelization structures in the receiver and transmitter, respectively, in these radio systems. Channelization and de-channelization can be defined as the filtering, decimation/interpolation and the frequency conversion of the signals transmitted and received.
The traditional receiver architecture as seen in
FIG. 1
can be explained in terms of the Radio Frequency (RF) signal being received by the antenna
105
and then downconverted to an intermediate frequency (IF) by an RF front end
110
. The RF front end
110
consists of components such as Low Noise Amplifiers (LNA's), filters and frequency conversion circuits. The desired channel is then extracted by the receiver channelizer
120
. The channelizer
120
also consists of LNA's, frequency conversion circuits and filters.
The desired channel is then processed at baseband by the RX baseband processing unit
130
to produce the received digital data stream. Today baseband processing usually consists of analog-to-digital conversion, digital filtering, decimation, equalization, demodulation, channel decoding, de-interleaving, data decoding, timing extraction etc.
The traditional transmitter architecture in
FIG. 1
, is the dual of the receiver architecture. The transmitted data is first processed by the TX baseband processing unit
140
which consists of data coding, interleaving, channel coding, modulation, interpolation filtering, digital-to-analog conversion etc. The baseband channel is then converted to an IF frequency via the transmit de-channelizer
150
. The transmit de-channelizer
150
consists of filters, frequency conversion circuits and low power amplifiers. The IF signal is then converted to RF and amplified by the RF front end
160
which consists of frequency conversion circuits, filters, and a high power amplifier. The signal is then transmitted by the antenna
165
.
FIG. 1
illustrates the traditional architecture for a single channel receiver and transmitter as used in a mobile terminal (i.e. mobile phone) application. In the case of a basestation, multiple channels are processed in a similar way. On the receiver end the path will split at some point to form multiple paths for each channel being processed. On the transmitter end the channels will be processed individually and then they will be combined at some point to form a multichannel signal. The point of the split and combination varies, and therefore a variety of basestation receiver and transmitter architectures can be created. More importantly, though, the traditional analog and digital interface is currently somewhere between the channelizer and baseband processing blocks.
The analog channelizer/dechannelizer is complex to design and manufacture, and therefore costly. Therefore, in order to provide a cheaper and more easily produced channelizer/de-channelizer, the future analog and digital interface will lie, instead, somewhere between the RF front end and channelizer blocks. Future radio receiver and transmitter structures of this type are called a variety of names, including multistandard radio, wideband digital tuners, or wideband radio and software defined radio, and they all require a digital channelizer/de-channelizer.
Efficient digital channelizer/de-channelizer structures, consisting of filtering, decimation/interpolation and frequency conversion, are very important in terms of power consumption and die area on a per channel basis. With one of the main goals being to integrate as many channels into a single Integrated Circuit (IC) as possible there are several known ways to achieve digital channelization/de-channelization. In the following examples it is assumed that a wideband signal is sampled by an ADC. The wideband signal is centered at an Intermediate Frequency (IF) and typically consists of many Frequency Division Multiplexed (FDM) channels.
The most obvious way is shown in FIG.
2
. This receiver architecture mimics the functions of a traditional analog channelizer with In-phase and Quadrature(IQ) frequency conversion using e.g. sin/cos generators, decimating and filtering on a per-channel basis. The bulk of the decimation filtering can be done with computationally cheap CIC filters. Integrated circuits containing this architecture are readily available from several manufacturers. The dual of this architecture is also possible for the transmitter.
The IQ channelizer is flexible in that it can handle many standards simultaneously and that the channels can be placed arbitrarily. Its main drawback is the need for an IQ frequency conversion at a high input sampling frequency and subsequent decimation filters for each channel. This means that the die area and power consumption is relatively high per channel.
Another channelizer possibility is to build a decimated filter bank in the receiver, as shown in FIG.
3
. This method shares a common polyphase filter between many, or all, channels. The hardware cost for this structure is small since it is split between many channels, and good filtering can be achieved. Filter banks are also good for use in transmitter de-channelizers since they both interpolate and add the channels together. An example of this is illustrated in WO 9528045 “Wideband FFT Channelizer”.
Many satellite transponders are also built upon this principle. Although these filter banks can be reconfigured to fit different standards, it is still difficult to accommodate multiple channel spacings at the same time. The decimated filter bank has a very low cost per channel, but only if all of the majority of channels are used. This architecture is also very inflexible since the channels have to lie on a fixed frequency grid and only one channel spacing is possible. Multiple standards make the filter bank concept require multiple sampling rates, which means multiple architectures, including the ADC and channelizer, are required for simultaneous multiple standards.
A variation on the structure of the decimated filter bank, called a subsampled filter bank, can lower the computational cost at the expense of flexibility. For example, requirements for adaptive channel allocation, irregular channel arrangement and frequency hopping precludes using subsampled filter banks, since all channels must be available at the same time.
The third main channelization technique is based on the fast convolution scheme of the overlap-add (OLA) or overlap-save (OLS) type. Fast convolution is a means of using cyclic convolution to exactly perform linear convolution, i.e. Finite Impulse Response (FIR) filtering. A state of the art fast convolution algorithm is shown conceptually in FIG.
4
. The input data is divided into overlapping blocks in the Block Generator. These blocks are discrete Fourier-transformed in the DFT (Discrete Fourier Transform) and subsequently multiplied point-by-point with a filter response in the frequency domain. This filter response can be obtained by discrete Fourier-transforming the impulse response of a filter. The blocks are then transformed back to the discrete time domain by the Inverse DFT (IDFT) and added together in the Block Combiner. The advantage of this technique is the lower computational requirement as compared to implementing the traditional form of linear convolution.
However, it is possible to modify the basic fast convolution algorithm such that it is possible to simultaneo

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