Odd/even bank structure for a cache memory

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G06F 1300, G06F 1306

Patent

active

044245610

ABSTRACT:
A cache memory for use in a data processing system wherein data words identified by even address numbers are stored separately from data words associated with odd address numbers to enable the simultaneous transfer of two successively addressed data words to or from the cache memory by the transferring of a data word associated with an odd address number and a data word associated with an even address number.

REFERENCES:
patent: 4041461 (1977-08-01), Kratz et al.
patent: 4084234 (1978-04-01), Calle et al.
patent: 4149239 (1979-04-01), Jenkins et al.
patent: 4195342 (1980-03-01), Joyce et al.

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