Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of...
Patent
1997-02-21
1999-05-04
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
438345, 438350, 438525, H01L 21331
Patent
active
058997237
ABSTRACT:
In fabricating a bipolar transistor, semiconductor dopant is introduced into a semiconductor body during a base doping operation to define a doped region, that forms a PN junction with adjoining semiconductor material and abuts a slanted sidewall of a field insulating region. The doped region constitutes a base region for the transistor. The base doping operation entails ion implanting the dopant into the body at a tilt angle of at least 15.degree. relative to the vertical. The minimum lateral base thickness and, the minimum sidewall base thickness increase relative to the minimum vertical base thickness. As a result, the magnitude of the collector-to-emitter breakdown voltage typically increases. The minimum lateral, sidewall, and vertical base thicknesses vary with the tilt angle and base-implant energy in such a manner that the minimum lateral base thickness and the minimum sidewall base thickness are separately controllable from the minimum vertical base thickness.
REFERENCES:
patent: 3595716 (1971-07-01), Kerr et al.
patent: 4441932 (1984-04-01), Akasaka et al.
patent: 4771012 (1988-09-01), Yabu et al.
patent: 5183768 (1993-02-01), Kameyama et al.
patent: 5258317 (1993-11-01), Lien et al.
patent: 5270226 (1993-12-01), Hori et al.
patent: 5288652 (1994-02-01), Wang et al.
patent: 5302535 (1994-04-01), Imai et al.
patent: 5338695 (1994-08-01), Ratnam
patent: 5342794 (1994-08-01), Wei
patent: 5350700 (1994-09-01), Yang et al.
patent: 5605849 (1997-02-01), Chen et al.
Alvarez, BiCMOS Technology and Applications (Kluwer Acad Pub., 2d ed.), 1993, p. 76.
Blauschild, High Voltage Analog Performance with Low-Voltage Digital Devices, IEEE J. Solid-State Circuits, vol. SC-13, No. 6, Dec. 1978, pp. 754-759.
Burnett et al, "Bipolar Reliability Optimization through Surface Compensation of the Base Profile," IEEE Int'l Reliability Physics Symp., Mar. 31 -Apr. 2 1992, pp. 107-111.
Havemann et al, "Process Integration Issues for Submicron BiCMOS Technology", Solid State Technology, Jun. 1992, pp. 71-76.
Ratnam et al, "The Effect of Isolation Edge Profile on the Leakae and Breakdown Characteristics of Advanced Bipolar Transistors," IEEE Bipolcar Circs. & Tech. Meeting, Oct. 7-8, 1992, pp. 117-120.
Simonton et al, "Channeling Effects in Ion Implantation", SRC Pub C93061, Feb. 1993, pp. 64-84.
Stolfa et al, "A BiCMOS 0.8.mu.m Process with a Toolkit for Mixed-Mode Design," IEEE Cust. Integ. Circs. Conf., May 9-12, 1993, pp. 24.2.1-24.2.4.
Taft et al, "Optimization of Two-Dimensional Collector Doping Profiles for Submicron BiCMOS Technologies", IEEE Int'l Elec. Devs. Meeting, 1991, pp. 33.6.1-33.6.4.
Chen Hung-Sheng
Teng Chih Sieh
Meetin Ronald J.
National Semiconductor Corporation
Nguyen Tuan H.
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