Boots – shoes – and leggings
Patent
1990-06-01
1991-07-02
Malzahn, David H.
Boots, shoes, and leggings
364737, 364745, 364258, G06F 748, G06F 900, G06F 1100
Patent
active
RE0336297
ABSTRACT:
A floating point, integrated, arithmetic circuit is organized around a file format having a floating point numeric domain exceeding that of any single or double precision floating point numbers, long or short integer words or BCD data upon which it must operate. As a result the circuit has a greater reliability, range and precision than ever previously achieved without entailing additional circuit complexity. Reliability is further enhanced by a systematic three bit rounding field, and by including means for detecting every error or exception condition with an optional expected response provided thereto by hardware. As a result of such organization, an unexpected increase of capacity is achieved wherein transcendental functions can be computed totally in hardware, and whereby mixed mode arithmetic can be implemented without difficulty. The numeric processor also includes a programmable shifter capable of arbitrary numbers of bit and byte shifts in a single clock cycle, as well as an arithmetic unit capable of implementing multiplication, division, modulo reduction and square roots directly in hardware.
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Nave Rafi
Palmer John F.
Ravenel Bruce W.
Intel Corporation
Malzahn David H.
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