Notch and flat sensor for wafer alignment

Details Notch and flat sensor for wafer alignment Notch and flat sensor for wafer alignment

2001-08-17

2004-01-13

Meier, Stephen D. (Department: 2853)

Radiant energy

Photocells; circuits and apparatus

With circuit for evaluating a web, strand, strip, or sheet

C250S559400, C250S559360, C250S559290

Reexamination Certificate

active

06677602

ABSTRACT:

TECHNICAL FIELD
The invention relates to wafer stages for supporting, rotating and aligning semiconductor wafers, especially for use in wafer process stations and inspection stations. The invention relates in particular to methods and apparatus for detecting notches and flat edges that are provided on wafer edges for establishing a reference position of such wafers.
BACKGROUND ART
Semiconductor wafer processing or metrology equipment frequently needs a device to orient the wafer before the processing or measurement begins. This type of equipment is almost always controlled by one or more processors. Frequently, such equipment has a video viewing subsystem capable of seeing a magnified view at any point on the wafer's surface. This equipment might also have a pattern recognition subsystem to orient the wafer. However, if there is no pattern recognition, or if the viewing subsystem has a small capture range, or if the wafer is unpatterned, then the wafers must be oriented by detecting notches or flats cut into the edge of the wafer.
There are many existing designs for wafer aligners. One general class of designs use three emitter/detector pairs; two located near where the notch or flat should be and the third where another portion of the edge of the wafer should be. The wafer is then moved in X,Y and theta until the edges partially blocks all three detectors.
Another design spins the edge of the wafer between a light source and a long photodiode. The signal from the photodiode is digitized and analyzed by algorithms to determine the position of the wafer in X, Y and theta. A variation of this technique uses a photodiode array in place of the long photodiode. A problem with most of these techniques is that they require dedicated processors or other complicated electronics that, among other problems, would be difficult to retrofit into equipment not initially designed to have notch or flat aligner.
An object of the present invention is provide a simple wafer aligner that is easily designed into wafer processing or metrology equipment with minimal changes to the electronics and hardware.
DISCLOSURE OF THE INVENTION
The present invention is a wafer alignment sensing system that can be easily incorporating into wafer processing equipment as described above.
The present invention uses a dual photodiode above the wafer. This is mechanically similar to the single long photodiode embodiment described above, except that the detector is a split diode with the gap oriented perpendicular to the edge of the wafer. The outputs of these two diodes are fed into a differential amplifier. As long as the two diodes are covered equally, the output is close to zero. When the notch starts to uncover one diode, the output increases. In effect the detector is sensitive only to the local angle at the edge of the wafer. The main advantage is that now the motor can be rotated until a certain analog threshold is reached at the output without having to digitize the signal. The threshold will not depend on the amount of wafer decenter. This detector is also sensitive to the areas near the corners of flats, and it would find the flat by looking for the thresholds at both corners. The accuracy would depend on the rotation speed and the time required for the electronics and software to respond. If necessary, after the notch is detected, the motor could back up and scan more slowly to find a more accurate position. The center X,Y position could also be found if needed by digitizing the output from only one of the two diodes. To minimize interference from room light we could use a near infrared LED and an IR filter in front of the diode, as is done in television remotes.
An alternative embodiment combines the dual photodiode scheme with large field pattern recognition for edge sensing. The idea here is to use the dual photodiode arrangement only for quickly detecting the rough position of the notch or flat. After that, a pattern recognition implementation like that described above could measure the wafer at the notch or flat and at two other sites on the wafer edge to determine the wafer center X,Y position and theta orientation more accurately. The three pattern recognition measurements would add a couple of seconds, and could be optional if high accuracy is not required. This technique for edge sensing avoids having to digitize or calibrate the diode output. The pattern recognition measurements could be taken either by moving the viewing system to the three points, or by keeping the viewing system fixed near the wafer edge and rotating the wafer to 3 positions.


REFERENCES:
patent: 3671748 (1972-06-01), Friedman
patent: 5684599 (1997-11-01), Shimoyama et al.
patent: 62-076643 (1987-04-01), None

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