Normalizer for determining the positions of bits that are set in

Details Normalizer for determining the positions of bits that are set in Normalizer for determining the positions of bits that are set in

1989-03-20

1990-08-07

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 700

Patent

active

049473581

ABSTRACT:
A normalizer that identifies the bits that are set in input data and generates output signals representing the positions of the set bits in the input data. The normalizer has a device arranged to receive an n-bit signal. Each of the bits of the n-bit signal are either set or clear. The normalizer operates iteratively, and during each iteration: determines an end most set bit; generates a signal representing position information for this end most set bit; and clears the end most set bit that was identified during the immediately previous iteration. The normalizer also includes a novel bit counter that provides a count of the number of bits set in the input data.

REFERENCES:
patent: 4236206 (1980-11-01), Strecker et al.
patent: 4785421 (1988-11-01), Takahashi et al.
patent: 4794557 (1988-12-01), Yoshida et al.
L. Dadda, "On Parallel Digital Multiplier", Associazione Elettrotecnica ed Elettronica Italiana, 1976, pp. 126-132.

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