Nonvolatile SNOS memory cell with induced capacitor

Details Nonvolatile SNOS memory cell with induced capacitor Nonvolatile SNOS memory cell with induced capacitor

1988-10-31

1991-05-28

Heinz, A. J.

Static information storage and retrieval

Floating gate

Particular biasing

365184, 365228, 357 235, G11C 700

Patent

active

050200305

ABSTRACT:
A silicon substrate with a drain area formed therein is used for the base of the device. A first polysilicon gate is disposed above the substrate with a layer of gate oxide therebetween. Adjacent to the first gate and contiguous to the same plane is a second polysilicon gate. The second gate and the substrate are separated by a layer of tunnel oxide and silicon nitride. The silicon nitride being used to store a charge. The state of the device is determined by the presence of a capacitance in the substrate generated by the charge on the silicon nitride. This device may function as a nonvolatile memory or a dynamic random access memory with the capability of capturing its DRAM state.

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"XICOR" Data Book, Sep. 1987, pp. 8-6 to 8-10; 8.varies.48 to 8-49; 8.varies.109; and 8-117 to 8-120, Second Edition, First Printing.

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