Static information storage and retrieval – Floating gate – Particular connection
Patent
1998-04-24
2000-07-18
Zarabian, A.
Static information storage and retrieval
Floating gate
Particular connection
36518527, G11C 1604
Patent
active
06091632&
ABSTRACT:
A plurality of blocks of memory cell transistors are formed on the respective isolated wells. In a write stage, a predetermined write-stage well voltage is applied to the well of a selected block including the memory cell transistors to be subjected to a write operation, a bias voltage is applied to the well of each of the remaining, non-selected blocks to increase a threshold voltage of the memory cell transistors of each non-selected block, in comparison with a threshold voltage determined by the predetermined write-stage well voltage, and a voltage is applied to the control gates of the memory cell transistors of each non-selected block to reduce a difference between a potential of the floating gate of each memory cell transistor of each non-selected block and a write-stage drain voltage applied to the drain of the memory cell transistor through the associated bit line such that a source-drain leak current of each memory cell transistor in the non-selected blocks falls in a permissible range.
REFERENCES:
patent: 5509018 (1996-04-01), Niijima et al.
patent: 5822248 (1998-10-01), Satori et al.
patent: 5847995 (1998-12-01), Kobayashi et al.
Sato Shin'ichi
Yoshimi Masanori
Sharp Kabushiki Kaisha
Zarabian A.
LandOfFree
Nonvolatile semiconductor storage device having a plurality of b does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile semiconductor storage device having a plurality of b, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile semiconductor storage device having a plurality of b will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2043597