Nonvolatile semiconductor storage device and writing method ther

Details Nonvolatile semiconductor storage device and writing method ther Nonvolatile semiconductor storage device and writing method ther

1998-10-06

1999-11-30

Nelms, David

Static information storage and retrieval

Floating gate

Multiple values

36518522, G11C 1604, G11C 1606

Patent

active

059954124

ABSTRACT:
A nonvolatile semiconductor storage device and writing method thereof are capable of concurrently executing a write operation and a verify operation of multi-value data into a plurality of memory cells and writing multi-value data at high speed. Latch circuits of Latch0 and Latch1 store an input multi-value data to be written into a memory cell selected by a bit line and a word line. Multi-value sense amplifiers read the multi-value data written in the memory cell. Based on the input multi-value data (latch nodes Q0#, Q1#) stored in the latch circuits of Latch0 and Latch1 and the multi-value data (sense nodes S0#, S1#) read from the memory cell by the multi-value sense amplifiers, a bit line voltage generating circuit applies a specified voltage for writing the input multi-value data into the memory cell to the bit line connected to the memory cell.

REFERENCES:
patent: 5818753 (1998-10-01), Gotou
1996 IEEE International Solid-State Circuits Conference, ISSCC96/Session 2/Flash Memory/Paper TP2.1, "A 3.3 128Mb Multi-Level NAND Flash Memory for Mass Storage Applications", Tae-Sung Jung et al., Samsung Electronics Co., Ltd., Kiheung, Korea, Feb. 8, 1996, pp. 32-33.
T-S Jung et al, "A 117-mm.sup.2 3.3V Only 128-Mb Multilevel NAND Flash Memory For Mass Storage Applications", IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996, pp. 1575-1583.

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