Static information storage and retrieval – Floating gate – Particular connection
Patent
1994-05-10
1995-10-03
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular connection
365218, 36523006, 36518911, 36518909, G11C 700
Patent
active
054557895
ABSTRACT:
Two paths for receiving the outputs of a logic select circuit LOGS are individually equipped in a symmetric manner with output MOSFETs Q52 and Q53, feedback MOSFETs Q54 and Q55 and isolating MOSFETs Q56 and Q57, the paired of which have conduction types different from each other. Negative erasing Vee voltage and programming Vpp voltage to be fed to the paths through the feedback MOSFETs are prevented without fail from being transmitted to a logic select circuit by the paired isolating MOSFETs of the different conduction types. As the elements for selecting the positive or negative logic output of the logic select circuit, CMOS transfer gates TG1 and TG2 can be adopted to maximize the amplitude of the output logic signal of the logic select circuit with respect to an operating power.
REFERENCES:
patent: 4893275 (1990-01-01), Tanaka et al.
patent: 5038327 (1991-08-01), Akaogi
patent: 5077691 (1991-12-01), Haddad et al.
patent: 5253200 (1993-10-01), Arakawa
patent: 5265052 (1993-11-01), D'Arrigo et al.
Furuno Takeshi
Nakamura Takeshi
Sato Hiroshi
Takahashi Masahito
Wada Masashi
Hitachi , Ltd.
Hitachi VLSI Engineering Corp.
Le Vu
Nelms David C.
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