Nonvolatile semiconductor memory with a protect circuit

Static information storage and retrieval – Floating gate – Data security

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Details

36518529, 365201, G11C 1134

Patent

active

059177500

ABSTRACT:
A plurality of erase circuits are provided for the blocks BLK(0) to BLK(n), each for one block. Protect circuits are connected to the erase circuits, respectively. The protects circuits generate protect signals PROT0 to PROTn, respectively. Each protect signal indicates whether the protect circuit is set in protect mode or not. Each erase circuit receives the protect signal from the protect circuit connected to it. A unit provided in the erase circuit determines, from the protect signal, whether the protect circuit is set in the protect mode. The unit changes the voltage applied to the sources of the memory cells of the cell block connected to the erase circuit, in accordance with whether the protect circuit is set in the protect mode or not. When a voltage is applied to the sources of the memory cells, a data item of a logic value is read from each memory cell. When a different voltage is applied to the sources of the memory cells, a data item of the other logic value is read from each memory cell. Hence, whether or not the protect circuits are set in protect mode can be determined, without erasing or writing data in the block of the memory cell array.

REFERENCES:
patent: 5084843 (1992-01-01), Mitsuishi et al.
patent: 5381369 (1995-01-01), Kikuchi et al.
patent: 5553026 (1996-09-01), Nakai et al.

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