Nonvolatile semiconductor memory using tunnel effect having a co

Details Nonvolatile semiconductor memory using tunnel effect having a co Nonvolatile semiconductor memory using tunnel effect having a co

1995-04-28

1997-06-10

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518904, 36518905, G11C 700

Patent

active

056383231

ABSTRACT:
A nonvolatile semiconductor memory having a plurality of bit lines, a plurality of word lines, and a plurality of memory cells. Each of the memory cells is provided at each intersection of the bit lines and the word lines. The nonvolatile semiconductor memory includes a plurality of latch units provided for each corresponding bit line, and a control circuit. The control circuit is used to supply a control voltage and a control signal to the latch units, to operate the latch units as units for simultaneously biasing voltages applied to first electrodes of specified memory cells through the bit lines during a write operation, to simultaneously write data into the specified memory cells, and during a read operation, as units for simultaneously reading data out of the memory cells. This memory has an inexpensive simple structure for carrying out a simple programming operation at high speed.

REFERENCES:
patent: 5452249 (1995-09-01), Miyamoto et al.
patent: 5490107 (1996-02-01), Akaogi et al.
patent: 5490110 (1996-02-01), Sawada et al.

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