Nonvolatile semiconductor memory having memory cells each storin

Static information storage and retrieval – Floating gate – Multiple values

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Details

36518518, 36518905, 36518907, 36518909, G11C 1134

Patent

active

058944362

ABSTRACT:
A variation in threshold of a memory cell is detected at a higher speed. A multi-valued nonvolatile semiconductor memory has a nonvolatile memory cell 41 for storing n-values (n.gtoreq.3) of data as thresholds in one cell, a reference signal generator 44 for emitting a reference signal group Vri (i.ltoreq.(n-1)), a reference signal group VriH(=Vri+.DELTA.V) and a reference signal group VriL(=Vri-.DELTA.V), a differential amplifier 43 for receiving either one of signals Vci (Vci<VriL<Vri<VriH<Vc(i+1)) corresponding to the stored data in the memory cell 41 at one input terminal and receiving the reference signal groups Vri, VriH or VriL at the other input terminal, a latch circuit 46 for latching output of the differential amplifier 43, a comparator 47 for comparing the output of the differential amplifier 43 with the output of the latch circuit 46, and a controller 48 for emitting control signals D1 to D6 in accordance with the output of the latch circuit 46 and controlling the differential amplifier 43 and the comparator 47.

REFERENCES:
patent: 5043940 (1991-08-01), Harari
patent: 5550772 (1996-08-01), Gill
patent: 5768191 (1998-06-01), Choi et al.
patent: 5815436 (1998-09-01), Tanaka et al.

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