Nonvolatile semiconductor memory device with redundancy and...

Static information storage and retrieval – Floating gate – Data security

Reexamination Certificate

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Details

C385S105000, C385S105000, C385S105000, C385S105000

Reexamination Certificate

active

07106627

ABSTRACT:
A memory cell array has a first and a second storage area. The first storage area has memory elements selected by an address signal. The second storage area has memory elements selected by a control signal. A control circuit has a fuse element. When the fuse element has been blown, the control circuit inhibits at least one of writing and erasing from being done on the second storage area.

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patent: WO 93/05512 (1993-03-01), None

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