Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-01-11
2005-01-11
Mai, Son (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185330
Reexamination Certificate
active
06842377
ABSTRACT:
A nonvolatile semiconductor memory device with a plurality of read modes switchably built therein is provided. This nonvolatile semiconductor memory device is the one that has a memory cell array in which electrically rewritable nonvolatile memory cells are laid out and a read circuit which performs data readout of the memory cell array. The nonvolatile semiconductor memory device has a first read mode and a second read mode. The first read mode is for reading data by means of parallel data transfer of the same bit number when sending data from the memory cell array through the read circuit up to more than one external terminal. The second read mode is for performing parallel data transfer of a greater bit number than that of the first read mode when sending data from the memory cell array to the read circuit while performing data transfer of a smaller bit number than the bit number when sending data from the read circuit up to the external terminal.
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Honda Yasuhiko
Kuriyama Masao
Takano Yoshinori
Tanzawa Toru
Hogan & Hartson LLP
Mai Son
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