Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2005-01-25
2005-01-25
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular connection
C365S185290, C365S185330, C714S800000, C714S819000, C714S758000, C714S782000, C714S784000
Reexamination Certificate
active
06847554
ABSTRACT:
A semiconductor memory device for error correction encoding and decoding able to avoid erroneous judgment occurring due to erroneous correction when a nonvolatile memory is in a predetermined initial state, wherein, at the time of writing, write data and predetermined status data, for example, erasure data when the nonvolatile memory is in an erasure state are compared and, when the result of the comparison is that the write data coincides with the erasure data, the erasure data is selected and, conversely when they do not coincide, the encoded data obtained by error correction encoding the write data is selected and written into the nonvolatile memory, while at the time of reading, when the result of the comparison between the read data and the erasure data from the nonvolatile memory is that the read data coincides with the erasure data, the erasure data is selected and, conversely when they do not coincide, the decoded data obtained by error correction decoding the read data is selected and output.
REFERENCES:
patent: 6111807 (2000-08-01), Ooishi
patent: 6259647 (2001-07-01), Ooishi
patent: 6396768 (2002-05-01), Ooishi
Kananen Ronald P.
Rader & Fishman & Grauer, PLLC
Sony Corporation
Tran Andrew Q.
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